Post B6q8WQdKwimSI4zcki by gloriouscow@oldbytes.space
(DIR) More posts by gloriouscow@oldbytes.space
(DIR) Post #B6q8VqniAfgl9pZOvQ by gloriouscow@oldbytes.space
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This is the Graphics Gremlin, an FPGA-powered retro video card by the talented @tubetime whom I must thank profusely for sending along.I love all the little messages on the silkscreen.
(DIR) Post #B6q8VrOvwHSl1Gz7wW by gloriouscow@oldbytes.space
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The Gremlin is powered by this Lattice iCE40HX4K FPGA. This makes the Gremlin reprogrammable. It also makes the Gremlin somewhat hard to purchase, as this FPGA has been discontinued. EDIT: Maybe not? I don't know lol
(DIR) Post #B6q8Vrsi9ZHYVcuuMC by gloriouscow@oldbytes.space
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Since this is an open source project, others have added to it - adding support for Plantronics video (an early 16-color "extended CGA" card) , HDMI ports, and other such luxuries.The Gremlin's Github repo is here:https://github.com/schlae/graphics-gremlin
(DIR) Post #B6q8VsNuHaEg4NVoyu by gloriouscow@oldbytes.space
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As you may know, I've got a particular interest in the Seequa Chameleon, along with @mcjonestech we nerd out on this quirky old luggable.The Chameleon had a unique, on-board CGA card - with a few tricks up its sleeve. Namely, it had two palette registers, and 4K of font SRAM.Everyone's dreamed about what games might have looked like on the IBM PC if the CGA had had palette registers. Even @tubetime himself hacked some in for funsies. This system really had them! I'd like to add Chameleon Video to the Graphics Gremlin.
(DIR) Post #B6q8VtG91vcYmat8WO by gloriouscow@oldbytes.space
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This is Area 5150.This is CGA. Yes, it does 16-color graphics on good ol' 4-color CGA. See if you can guess how this is done. This effect breaks your emulator.Unfortunately, this effect also breaks your Graphics Gremlin. Well, I spent three years building an emulator that could run this effect, so I reckon if anyone's gonna make the Gremlin run Area 5150 all the way through it might as well be me.
(DIR) Post #B6q8Vu6FuBIxODGkkK by gloriouscow@oldbytes.space
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This effect is cycle-counted. In the CGA's "I can't believe its not NTSC" timings, a scanline is 912 hdots long. The CGA is driven off the same system crystal as the CPU is - so with a bit of coding wizardry you can get the CPU, 8253 timer and CGA card running together in phase, called lockstep.For every 3 pixels drawn by the CGA, the 8088 CPU in the PC executes one cycle. So assuming you are in sync with the monitor, you can stay in sync as long as every scanline of your effect executes in exactly 304 CPU cycles. Easy, right?Did I mention that the author of this effect, reenigne, is the same fellow who recently decoded the 80386 microcode?Some people are too smart for this world.
(DIR) Post #B6q8Vun9KhcFXFL0bY by gloriouscow@oldbytes.space
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I need you to understand that the Graphics Gremlin not working in Area 5150 is not a reflection of @tubetime 's lack of ability. This thing is on a completely different level. This thing is abuse of the CGA card that the world has never seen.The Motorola 6845 cannot normally do what the effect does. It is designed to be set up for a stable screen geometry and left alone to do its thing. reenigne was like "screw that" and so to get the 6845 to do what he wanted he reprograms it on the fly, eight times per scanline.
(DIR) Post #B6q8Vva4OokPyyE4rA by gloriouscow@oldbytes.space
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So you have a few things going on. You have the CPU itself, executing numerous instructions. You have the timer ticking away, firing off interrupts. You have DRAM refresh DMA executing four times per scanline. You have the 8 6845 CRTC register writes. You have writes to CGA video memory with corresponding CGA wait states. Every single one of these things must happen exactly as a real PC would do it, every last single cycle, because the effect must run in 304 cycles per scanline.
(DIR) Post #B6q8Vw8SKyFlhcJXSC by gloriouscow@oldbytes.space
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The entire effect is set-up and achieves lockstep in a startup routine I dubbed "The Gauntlet" because it exercises edge cases I had never seen before. I fixed no fewer than 28 bugs in my emulator just in the startup routine for this single effect.I published a blog article a year ago going into a deep dive on this if you're curious.https://martypc.blogspot.com/2025/05/emulator-debugging-area-5150s-lake.html
(DIR) Post #B6q8VwgqH7l7QGP03E by gloriouscow@oldbytes.space
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So, what's the Gremlin doing wrong? Well - I don't know for sure. Sounds like a fun weekend project to figure that out.
(DIR) Post #B6q8VxEsEayt7oKB60 by gloriouscow@oldbytes.space
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To figure out what Area 5150 was even doing I needed to employ a 32-channel logic analyzer. I made a custom PCB that fits into the 8087 socket - this is convenient because the 8087 socket is pretty much directly electrically connected to the 8088 socket save a few scant pins we don't even really care about. This lets us monitor the activity of the CPU.
(DIR) Post #B6q8Vxk4Mbw0gYv5ii by gloriouscow@oldbytes.space
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The ribbon cable runs up to this breakout board where we can leisurely attach our probes. By making a custom PCB I was able to give each probe a convenient ground, a luxury you usually do not have.
(DIR) Post #B6q8VyEuVwbYEDLinA by gloriouscow@oldbytes.space
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I know a lot more about electronics now than I did when I made that thing - you'll notice that it is completely passive, and frankly, it is something of a miracle that it works. Extending bus signals over several feet of ribbon cable has some ramifications, and if I ever spin up Mk2 of this board it will have some series termination on it.
(DIR) Post #B6q8Vytg4NDMGeQHKq by gloriouscow@oldbytes.space
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Anyway, enough tooting my own horn(s).I suspect there may be some inaccuracies in the Gremlin's MC6845 implementation. The 6845 is a surprisingly nuanced chip. It is conceptually simple - it maintains a small register file and a set of counters, by which it tracks out a two dimensional display field.The 6845 has a Horizontal Total register and a Vertical Total register, and it ticks out a screen that is (Horizontal Total + 1) * (Vertical Total) big, with a number of scanlines defined by (Vertical Total Adjust) tacked on the end to make up for any remainder needed for a valid video signal. In there you also define the timings for hsync and vsync and such.
(DIR) Post #B6q8Vzxc7DxPZ9Gw6q by gloriouscow@oldbytes.space
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Where things get weird is where you start reprogramming the 6845 while it is operating. You were never supposed to do that. But demosceners don't care.The original PC demoscene isn't the most vibrant thing, but the 6845 CRTC chip (and several variants thereof) were used in a system with a much livelier demoscene: the Amstrad CPC.The demogroup LOGON SYSTEM wrote a book documenting the behavior of the various CRTC chips used on the CPC. It's called the CRTC COMPENDIUM.How complex are the nuances of the CRTC?It is 286 pages long.You can check it out here:https://www.cpcwiki.eu/imgs/4/4a/ACCC1.8-EN.pdf
(DIR) Post #B6q8W0vsVAAAa3T42i by gloriouscow@oldbytes.space
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Imagine not only writing one of those insane demoscene productions but having to write it for like four different CRTC chips. Thankfully the Motorola MC6845 used in the CGA is a "Type 2" CRTC as described in the CRTC compendium, so we only need like 1/4th of the material in there.
(DIR) Post #B6q8W1j9XxZv2sWPqa by gloriouscow@oldbytes.space
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Can I just give a shoutout to LOGON SYSTEM for making such an incredible resource? This was clearly a labor of love, the distillation of knowledge accrued in the pursuit of one of humanities' most obscure and yet exquisite art forms - the Demo.
(DIR) Post #B6q8W37eMMlfN8zUfY by gloriouscow@oldbytes.space
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Check out some of LOGON SYSTEM's demos for the CPC here.https://www.youtube.com/watch?v=RHDkptcFkZIhttps://youtu.be/tmNJjXNqiso?list=RDtmNJjXNqiso&t=13https://www.youtube.com/watch?v=eD8yZK-CQ94&list=RDeD8yZK-CQ94This system had a 4MHz Z80 and 64-128KB of memory, as a contemporary system to the Commodore 64, for context. My favorite touch about LOGON SYSTEM demos? They like to tell you what emulator you're using. For some reason I find that hilarious.
(DIR) Post #B6q8W4dEkPd23OmEXg by gloriouscow@oldbytes.space
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The first place I'm going to start sniffing around is looking through the Verilog for the Graphics Gremlin's 6845 and seeing if has any of the gotcha bugs that I discovered impacting Area 5150.The Verilog source for the 6845 is at https://github.com/schlae/graphics-gremlin/blob/main/verilog/crtc6845.v
(DIR) Post #B6q8W5ro9isVssbNtQ by gloriouscow@oldbytes.space
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The 6845 defines a rectangular display area of character cells.It has horizontal and vertical character counters that keep track of which cell is being scanned out.when the horizontal character counter reaches horizontal total (+1) it wraps back to 0, and the vertical character counter is incremented.The 6845 also has a fixed vsync period - it lasts 16 scanlines and is not adjustable. There's a counter - the Vertical Sync Counter (that LOGON SYSTEM calls C3H) that ticks away from 0-15 before ending vsync.
(DIR) Post #B6q8W6wS9wBjDZmblw by gloriouscow@oldbytes.space
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As part of its devil magic, Area 5150 causes the CRTC to reach horizontal total twice per scanline. During the initial setup sequence, this continues on through vertical blank. This means that we get an 8-scanline VSYNC, despite the 6845 having a fixed 16-scanline vsync period. So that's fun.
(DIR) Post #B6q8W8BNXvin49m2fw by gloriouscow@oldbytes.space
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There's one subtle bit we can add to the Gremlin's 6845, and that is the "last line" flag.I'll let the CRTC Compendium describe this.This has implications if we are reprogramming a running 6845.
(DIR) Post #B6q8WAckT8nqdcavc8 by gloriouscow@oldbytes.space
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Most of the logic on the 6845 is driven by some counter reaching some-register-value, so this is a bit of a surprise to discover a flag that gets set at the start of a line. It goes on.This is one single flag. One page. There are 286 pages. So you start to see the problem with making a 6845 that can withstand demo abuse.
(DIR) Post #B6q8WC6YxmFJENYFiy by gloriouscow@oldbytes.space
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I'm not saying my 6845 is perfect, far from it - it only does what it needs to do to run Area 5150. If I tried to plug it into an Amstrad CPC emulator, I am sure it would be immediately murdered. Some of the fancier demoscene effects coming out are abusing the 6845's interlaced mode flag and I don't even emulate interlaced mode at all.
(DIR) Post #B6q8WERuFOVUV9YKGm by gloriouscow@oldbytes.space
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We need accurate CGA wait states for these demo effects to work. The CGA's wait state generator is fairly simple.I have yet another blog post that goes over it:https://martypc.blogspot.com/2023/05/exploring-cga-wait-states.htmlWhat's interesting is this blog post is in SEO jail for some reason.If I google for "exploring CGA wait states martypc blogspot" it is not even on the first page. I have no idea why.
(DIR) Post #B6q8WGKXFlncKs7T3g by gloriouscow@oldbytes.space
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The Gremlin has wait states disabled in the repo snapshot.parameter USE_BUS_WAIT = 0; // Should we add wait states on the ISA bus?@tubetime Do you know if that's how it was built on this card?
(DIR) Post #B6q8WLIamQDRkIFUDw by gloriouscow@oldbytes.space
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Before we try to fix Area 5150 we can try getting a slightly-less demanding demo working, 8088 MPH.There's really only one major cycle-counted effect in that demo, the beam-raced Kefrens Bars, and it requires accurate CGA wait states to work.The Graphics Gremlin doesn't model the flip-floppy Johnson Counter like I did - it just uses a 5-bit counter ticked at 28MHz , individual clocks can be picked out by tying them to specific values of that counter. // Sequencer: times internal operations always @ (posedge clk) begin if (clkdiv == 5'd31) begin clkdiv <= 5'd0; end else begin clkdiv <= clkdiv + 1; end end // For 80 column text, we do everything twice for a complete clkdiv cycle. // For 40 column text, we do everything once for a complete clkdiv cycle. assign lclk = (clkdiv == 5'd0); assign hclk = (clkdiv == 5'd0) || (clkdiv == 5'd16);
(DIR) Post #B6q8WO7iHKIQVQBLBQ by gloriouscow@oldbytes.space
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assign hclk = (clkdiv == 5'd0) || (clkdiv == 5'd16So specifically, this is the "high resolution character clock" and it gets an edge every 16 cycles of the clock divisor, which works out to 14MHz/8. The Gremlin uses what I understand is a fairly common shortcut in FPGA-land - there's rarely any reason to care about the length of a clock when most logic is edge-triggered. So HCLK here is only active for one tick of the master clock at a time.The tricky thing is that the CGA produces a number of derived clocks that are the XOR of two other clocks - including its wait state generator, and when you XOR two clocks together their shape and duration very much does matter. The CGA's wait state generation (basically, its arbitration of the IO_CH_READY pin) is driven off a very small FSM driven by the edges of Q1 and /RAS. /RAS itself is produced via /LCLK ^ Q1. I mean just look at all these clocks. It's hard to keep it all straight.
(DIR) Post #B6q8WQdKwimSI4zcki by gloriouscow@oldbytes.space
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Anyway, enough blabbering, let's fire up the 5150 and stick the Gremlin in it.
(DIR) Post #B6q8WWJhocdtuvr1zE by gloriouscow@oldbytes.space
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Life!
(DIR) Post #B6q8WaKYtNhiMkHlsO by gloriouscow@oldbytes.space
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Just to be clear this isn't what the end credits of Area 5150 are supposed to look like.
(DIR) Post #B6q8WeBqXj6qKsErqa by gloriouscow@oldbytes.space
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An ISA card generates wait states by pulling pin A10 of the ISA bus, IO_CH_READY, low. A probe of this pin shows a solid, unwavering 5V. This means our Gremlin wasn't built with the wait state option enabled.reengine accounted for every single wait state cycle in his cycle-counting calculations when writing these demos. No wait states therefore means the beam-racing code runs a bit to too fast, all the insane mid-scanline CRTC register writes end up being issued at the wrong times, things don't latch when they should or latch when they shouldn't - essentially, you get the green spaghetti.I have seen a LOT of green spaghetti. I could probably wallpaper my apartment with screenshots of green spaghetti.So now we need to figure out the development environment for the Gremlin so we can reprogram it.
(DIR) Post #B6q8WhGZ6dfNsNTB7Q by gloriouscow@oldbytes.space
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Well, the fun thing is I seem to not have the correct FTDI cable. So this will have to wait for the moment.