Posts by gloriouscow@oldbytes.space
(DIR) Post #B6q8WO7iHKIQVQBLBQ by gloriouscow@oldbytes.space
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assign hclk = (clkdiv == 5'd0) || (clkdiv == 5'd16So specifically, this is the "high resolution character clock" and it gets an edge every 16 cycles of the clock divisor, which works out to 14MHz/8. The Gremlin uses what I understand is a fairly common shortcut in FPGA-land - there's rarely any reason to care about the length of a clock when most logic is edge-triggered. So HCLK here is only active for one tick of the master clock at a time.The tricky thing is that the CGA produces a number of derived clocks that are the XOR of two other clocks - including its wait state generator, and when you XOR two clocks together their shape and duration very much does matter. The CGA's wait state generation (basically, its arbitration of the IO_CH_READY pin) is driven off a very small FSM driven by the edges of Q1 and /RAS. /RAS itself is produced via /LCLK ^ Q1. I mean just look at all these clocks. It's hard to keep it all straight.
(DIR) Post #B6q8WQdKwimSI4zcki by gloriouscow@oldbytes.space
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Anyway, enough blabbering, let's fire up the 5150 and stick the Gremlin in it.
(DIR) Post #B6q8WWJhocdtuvr1zE by gloriouscow@oldbytes.space
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Life!
(DIR) Post #B6q8WaKYtNhiMkHlsO by gloriouscow@oldbytes.space
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Just to be clear this isn't what the end credits of Area 5150 are supposed to look like.
(DIR) Post #B6q8WeBqXj6qKsErqa by gloriouscow@oldbytes.space
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An ISA card generates wait states by pulling pin A10 of the ISA bus, IO_CH_READY, low. A probe of this pin shows a solid, unwavering 5V. This means our Gremlin wasn't built with the wait state option enabled.reengine accounted for every single wait state cycle in his cycle-counting calculations when writing these demos. No wait states therefore means the beam-racing code runs a bit to too fast, all the insane mid-scanline CRTC register writes end up being issued at the wrong times, things don't latch when they should or latch when they shouldn't - essentially, you get the green spaghetti.I have seen a LOT of green spaghetti. I could probably wallpaper my apartment with screenshots of green spaghetti.So now we need to figure out the development environment for the Gremlin so we can reprogram it.
(DIR) Post #B6q8WhGZ6dfNsNTB7Q by gloriouscow@oldbytes.space
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Well, the fun thing is I seem to not have the correct FTDI cable. So this will have to wait for the moment.
(DIR) Post #B6tfSDVbgIjeO8rA6C by gloriouscow@oldbytes.space
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Since I had so much fun analyzing the MC6845, I thought I'd take a look at another chip @infosecdj was kind enough to photo, the NEC µPD765 floppy disk controller.This was the controller in the original IBM PC.The first thing you notice is the absolutely enormous ROM taking up 1/3 of the chip.#retrocomputing
(DIR) Post #B6tfSDlCkJDDAW9cPY by gloriouscow@oldbytes.space
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#retrocomputing It was known that the 765 has microcode - but that's an awful lot of microcode. 16,384 bits. That's more than an 8088. That seems suspiciously too much microcode!
(DIR) Post #B6tgmjQsnanJ8zzd0y by gloriouscow@oldbytes.space
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@linear 8051? in my 765?
(DIR) Post #B6thCOgUYxcmK8X3jM by gloriouscow@oldbytes.space
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#retrocomputing Here's where shit gets a bit weird. Over on the right, is the microcode address generator. The data bus feeds into it. The microcode is .... data-addressable?
(DIR) Post #B6thCOstopY6wcKy4O by gloriouscow@oldbytes.space
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The ROM has 16 outputs. Each block of 8 outputs ties back to the data bus, D0-D7. Now that' an odd thing to do, isn't it?Except someone on Hackaday left an intriguing comment, 14 years ago:
(DIR) Post #B6thCP6izQbldUo0cS by gloriouscow@oldbytes.space
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Well, that's certainly tantalizing. But it doesn't explain why the microcode address generator would take the data bus as input.Unless...there was more than microcode in there.I did say there was an awful lot of bits in there...
(DIR) Post #B6thCPKYA1fQKNH3AW by gloriouscow@oldbytes.space
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My theory, and we'll see if this pans out. But just putting my bare-ass naked speculation out there into the world for what its worth.I think it has an MFM encoding table in there.
(DIR) Post #B6thCQsyNWnR9QO3Si by gloriouscow@oldbytes.space
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When you send the 765 a byte to write to the floppy it has to convert that byte into an MFM bit sequence. Now, you could have a bunch of circuitry to calculate MFM bitstreams, or you could do like an emulator and just have a table.
(DIR) Post #B6thCRYRtJyPE3nB6u by gloriouscow@oldbytes.space
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I was flip-flopping between it being a coding table and being microcode, because stuff didn't make sense either way.It's definitely microcode. And i know there's an initial 4 bit field.Because that field appears to select one of the 765's registers.Oh, right. Here's the 765's register file. 12 8-bit registers.
(DIR) Post #B6tyM7g8LLGfhKaVxw by gloriouscow@oldbytes.space
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How bad of an idea would it be to quit my job to finish my PC Emulation Book. It'd be like quitting your job to write a novel, except there's no money at the end.So basically, it'd be like quitting your job to write a novel
(DIR) Post #B6tyMAX1jelYXxLmgi by gloriouscow@oldbytes.space
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I feel like this is a very appropriate time to walk way from the IT industry. It's just a shame I don't have any marketable skills that I don't hate using.
(DIR) Post #B6tyMEhSEpU3TSGAUq by gloriouscow@oldbytes.space
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You could probably apply troubleshooting skills to say, being a car mechanic, but I feel like they probably hire young folk for that - I've probably aged out of the entry level for a lot of different careers
(DIR) Post #B6tyMGytkwcqY8R7xo by gloriouscow@oldbytes.space
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is walking quietly into the ocean a career path?
(DIR) Post #B6tykXEqxn2Rv9T6dk by gloriouscow@oldbytes.space
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@linear I could start an unsuccessful kickstarter.