Post B6g2F8edznMoIkNSfw by azonenberg@ioc.exchange
(DIR) More posts by azonenberg@ioc.exchange
(DIR) Post #B6fzSjMIXgTW2UaNZg by azonenberg@ioc.exchange
0 likes, 0 repeats
Finally got some good photos of the VSC8512.To recap, this is the 3 lane QSGMII to 12 port 10/100/1000 baseT Ethernet PHY that I use on my switch project.I need a better process for decapping large BGAs with organic substrates without damaging the top layer during repeated handling cycles. So this is not the prettiest image but the floorplan will look a lot better once I etch down.https://siliconprawn.org/map/microchip/vsc8512/azonenberg_mz_mit20x/
(DIR) Post #B6g0K7eUwxmGjSYeUC by azonenberg@ioc.exchange
0 likes, 0 repeats
Handy pin 1 mark. You know, if you feel like counting through 676 bond pads to find one
(DIR) Post #B6g0QCo6hGTESQx9Iu by azonenberg@ioc.exchange
0 likes, 0 repeats
This looks like maybe some kind of CD etch measurement feature or something to test minimum feature size on the aluminum layer? It's consistently shorting between the parallel lines with no obvious rhyme or reason
(DIR) Post #B6g0ch6ds7C5u3ZseW by azonenberg@ioc.exchange
0 likes, 0 repeats
Artwork in the bottom right corner. Anybody have any idea what any of these might be?This was designed by Vitesse who I think is based in France if that gives any hints, but the SERDES IP was designed in Germany and I have no idea who did the top level design
(DIR) Post #B6g0i8owG1rnJ1tVz6 by azonenberg@ioc.exchange
0 likes, 0 repeats
Layer markings. Looks like eight metal layers, seven copper plus one aluminum, which is consistent with the TSMC 65nm node that I already suspected this was. Looks like rev B on M2/M3/M8 and rev A on the rest
(DIR) Post #B6g0rZS8boE0Vij4AC by azonenberg@ioc.exchange
0 likes, 0 repeats
Product ID "Luton26". Further confirmation that this is a nerfed VSC742x part... Atom12 is the internal name for the VSC8512, while Luton26 is VSC742x
(DIR) Post #B6g0zyDyOPSnef6buy by azonenberg@ioc.exchange
0 likes, 0 repeats
Overview of the bottom right corner showing TSMC signature fiducial in the corner, Vitesse name (no fancy logo), artwork, and some other stuff
(DIR) Post #B6g1Nr00uJHWCExsH2 by azonenberg@ioc.exchange
0 likes, 0 repeats
Longer shot of the whole southeast corner showing what appears to be the DDR PHY that is only used in the VSC742x (DQ/DQS balls are marked NC and VDDQ as ground in the VSC8512 version).Guessing some of the blocks inboard of the IO cells are PLLs or read/write FIFOs but we won't know until I get some of the BEOL off
(DIR) Post #B6g1srwHSluO5X0Xw0 by azonenberg@ioc.exchange
0 likes, 0 repeats
Closeup of the southwest corner showing the SERDES area and PLL. There's two different SERDES macros on the chip, SERDES1G and SERDES6G.The SERDES1G are used in SGMII mode and are only 1.25 Gbps capable, but there's a lot of them (9 lanes I think).The SERDES6G are 6 Gbps capable and used for QSGMII mode (which is what my switch uses. I think the SERDES6G are the ones left of the PLL block with the big L-C resonator inductor.
(DIR) Post #B6g2CCWt8H1PRzLhJo by azonenberg@ioc.exchange
0 likes, 0 repeats
Closeup of one of the Ethernet PHY tiles.There's 12 PHYs total, divided into three 4-port groups. Each group appears to be two 2-port blocks with some kind of shared analog block down the centerline.This view shows two of the PHYs plus the common block, from the northwest corner of the die.You can clearly see the four-fold symmetry in the PHY logic, which makes sense since 1000baseT has four identical PAM5 lanes.
(DIR) Post #B6g2F8edznMoIkNSfw by azonenberg@ioc.exchange
0 likes, 0 repeats
Higher res scans of the SERDES and PHY regions are in progress then I'll put it on ice until I have time to delayer
(DIR) Post #B6gBm7X65PlrxxeJSS by maehw@chaos.social
0 likes, 0 repeats
@azonenberg the upper one looks like an ATC tower + airplane to me. The lower one like some kind of bear paw.
(DIR) Post #B6gHOJPOscpHZc4zcu by equinox@chaos.social
0 likes, 0 repeats
@azonenberg I thought Vitesse was Danish, but not sure 🤔
(DIR) Post #B6gKfarVXen8UP9tfk by equinox@chaos.social
0 likes, 0 repeats
@azonenberg https://www.eetimes.com/vitesse-in-european-push-to-50gbit-s/"The acquisition will add about 30 designers to the existing European group, which includes a team in Copenhagen, Denmark, that was responsible for a range of recently launched 10Gbit/s framers." (in 2000)
(DIR) Post #B6gKfb3unWiT6sxo0m by azonenberg@ioc.exchange
0 likes, 0 repeats
@equinox Then it goes on to mention a site in Dussenberg (which I think is a typo for Duisburg, perhaps? The Vitesse German Design Center is in the Dortmund area, Duisburg is close by but I can't find any place called Dussenberg in some quick searching) that I happen to know designed the 6 Gbps SERDES macro on this part.But it seems like the company was not HQ'd in Denmark, corporate actually was in the US according to some digging although they may well have started elsewhere.
(DIR) Post #B6gfLYxizeZtqLMAEK by penguin42@mastodon.org.uk
0 likes, 0 repeats
@azonenberg Someone added it after wasting an afternoon having the chip the wrong way around while probing/examining it?
(DIR) Post #B6gsCi9Glj5v8DrkMC by philpem@digipres.club
0 likes, 0 repeats
@azonenberg The top one looks like a plane flying past a control tower. Could be a reference to London Luton Airport given the codename. In which case, maybe someone was an Easyjet fan (someone has to be!)Come to think of it, it does look A LOT like Luton's control tower.The second one looks like a bear paw. Closet furry or bear on the design team? Or just a fan of bears. Maybe a sports team near the office or HQ or the lead designer's signature?