Post B4w7DfYXjbNL6IDhAm by gsuberland@chaos.social
(DIR) More posts by gsuberland@chaos.social
(DIR) Post #B4w7DeFia6it3cP9Bw by dlharmon@chaos.social
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Testing libjaytag is getting complicated, requires several eval boards currently. I'm making this thing to be able to have an automated test of multiple targets and JTAG interfaces all on one board.JTAG targets:XCZU7EV (Zynq US+)XCSU10P (Spartan US+ which is weird and new)XC7Z010 (Zynq 7)XC7A35T (Xilinx 7 series FPGA)CCGM1A1 (Cologne Chip Gatemate FPGA)LFE5U-12 (Lattice ECP5)STM32H7R3 (uC, also as JTAG interface)Slot for a Raven board, connector for FTDI probe.
(DIR) Post #B4w7DeZDPcJq25Wia8 by dlharmon@chaos.social
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I noticed a lot more power pins than usual on the Spartan US+ FPGA, no decoupling caps on the package drawing. They removed the decoupling requirements from the PCB design user guide PDF, moved that to the PDM power estimator tool and it's dynamic based on the estimate. It's wanting some 0201s unlike the chips with on package caps.I'll go with an 4.3 uF 0204 instead, likely the same part they use on the package.
(DIR) Post #B4w7DenkXZwelAKKEi by dlharmon@chaos.social
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It's showing no caps at all required on the 1.8 V VCCAUX. That can't be right so I'll decouple it anyway with a few 10 uF 0402.At least they are getting the values right, the 0201 being called for is 1 uF, 0402 is 10 uF, 0603 is 47 uF, etc.
(DIR) Post #B4w7Devu3GT1AS8pwe by dlharmon@chaos.social
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Anything else I should throw in? I considered an XC3S or XC6S part but the XC7A covers most of that code. The cost is about 5x what I remember paying in the past too. I bought the Gatemate and SU+, everything else on here is leftovers or harvested from scrap.There will be a header for expansion.I'm probably going to put a bunch of U.fl coax connectors on IO. Especially the SERDES on the Gatemate. Might throw an SFP+ on the XCZU.
(DIR) Post #B4w7Df09nRrzNe8EZk by gsuberland@chaos.social
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@dlharmon partially sensible decoupling advice from a vendor??? what is the world coming to
(DIR) Post #B4w7DfMqR61AW0kLwG by dlharmon@chaos.social
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@gsuberland Xilinx is surprisingly good here and has been for a long time. I think I actually learned how to do it right from their really good PCB design guide for some ancient Virtex early in my career.I'm in the process of a design review on something else and have to decide if it's worth contesting Analog Devices terrible decoupling advice or not on one of their parts.
(DIR) Post #B4w7DfTw0jgms040zQ by dlharmon@chaos.social
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I don't have a normal Ultrascale+ part on here but that code is well covered by the ZU+, SU+, XC7A. Also, I use US+ heavily so any issues would get caught in my day to day usage.
(DIR) Post #B4w7DfYXjbNL6IDhAm by gsuberland@chaos.social
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@dlharmon AD is one of the worst offenders. sometimes they get it right, but often they get it cluelessly wrong. I've seen them recommend a 10nF 0603 + 100nF 0603 for decoupling. just... what?
(DIR) Post #B4w7Dfjt3QRvfTWkr2 by dlharmon@chaos.social
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@gsuberland I guess they kind of have to be when they make parts that can do a 100 A load step in nanoseconds if you aren't careful.
(DIR) Post #B4w7Dft6V9p283q7Dk by dlharmon@chaos.social
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@gsuberland This one is worse. 100 pF, 1 nF, 10 nF, 100 nF all 0402. I'll probably flag it, note that it is exactly what the datasheet calls for, explain why the datasheet is wrong.Hopefully I'll have a network analyzer covering lower frequencies later this year and can do a blog post replicating a few AD dev boards and showing how much better they could be. My 45 MHz - 50 GHz one isn't of much use for power.
(DIR) Post #B4w7DgBBPwHf28IYOu by gsuberland@chaos.social
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@dlharmon 100pF!?? that's batshit lol
(DIR) Post #B4w7DgKOrfelUibulc by gsuberland@chaos.social
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@dlharmon there's probably that much in the plane already
(DIR) Post #B4w7DgSuM2Shv6ai1o by dlharmon@chaos.social
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@gsuberland And it just pushes the real decoupling farther away from the chip. I'd have to dig but I think I've seen 10 pF decoupling in some of their datasheets.TI seems to be coming around on some parts. One of their diff amps I'm using calls for a large value 0204 as the sole decoupling cap.
(DIR) Post #B4w7DgeFfrXIUHtli4 by azonenberg@ioc.exchange
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@dlharmon @gsuberland I've modeled most of my decoupling to date off the 7 series guidelines with 0.47 0402 and 4.7 0603. Can probably do better with modern mlcc's but i still have a reel of each dating back to when 7 series was the new hotness and it's generally served me pretty well lol
(DIR) Post #B4w7ICpxwFHFThX4qG by azonenberg@ioc.exchange
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@dlharmon @gsuberland i have some 1 uF 0201s I'm starting to use in new designs for finer pitch bgas
(DIR) Post #B4w7WBn6cn96HtrXFo by azonenberg@ioc.exchange
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@dlharmon @gsuberland my picovna goes down to a few khz and i have an experimental 2 port shunt through filter in ngscopeclient i want to play with for some pdn measurements on future boards