Post B32hfM6a7fF0F3lTkG by infosecdj@infosec.exchange
(DIR) More posts by infosecdj@infosec.exchange
(DIR) Post #B32hfM6a7fF0F3lTkG by infosecdj@infosec.exchange
2026-02-06T08:20:39Z
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Hello! It has been a little while, but #nakeddiefriday is back in town.Today's exhibit is an old PIC1650A. Yes, one of *the* PIC series of microcontrollers. Note it was designed by General Instrument in 1980. It was fabbed in a single metal layer, metal-gate NMOS process. The image is about 4.3x3.8 mm.No full-res link as SP is still borked.#electronics #reverseengineering #icre
(DIR) Post #B32hfSQIdGZvpx2JJQ by infosecdj@infosec.exchange
2026-02-06T08:29:50Z
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We are kindly provided with a slightly yellowed block diagram of this device.One can easily identify where the program ROM is on the die; it takes a lot of space in the top left of the image. The register file is in the center left. I suppose the instruction register is the structure right below the ROM. The PC register and its incrementer is above the register file. And somewhere in there must be the ALU and decoder+control logic.
(DIR) Post #B32hfYFAzXFJtBsVo8 by infosecdj@infosec.exchange
2026-02-06T08:37:38Z
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This bit looks to be decoding at least some parts of the instruction and runs a lot of wiring to the next part. It's a PLA, of course.
(DIR) Post #B32hfeBqso9UKcMwSW by infosecdj@infosec.exchange
2026-02-06T08:39:02Z
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And this looks like the 8-bit ALU, with a 8-bit bus running on the left from the register file to the global bus, on which this unit also sits. Not much circuitry in there, somehow.
(DIR) Post #B32hfjjMHevPVz5Gsa by infosecdj@infosec.exchange
2026-02-06T08:43:55Z
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For each I/O port pin, we have 4 control signals and one data bus tap (running off to the right of the snippet here). Apparently, controls are read, write, and clear. I suppose the 4th one is global enable for the port, or similar.
(DIR) Post #B32hfph66ygK0i4YBk by infosecdj@infosec.exchange
2026-02-06T08:55:50Z
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Let's have a closer look at the ROM circuitry.The bit line multiplexer is nothing more than a 8-way NOR gate; 8 active transistors and one load. Bitlines are vertical here and are formed via diffusion.
(DIR) Post #B32hfvepwIREVR3pUu by infosecdj@infosec.exchange
2026-02-06T09:00:47Z
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But there are 8 bit lines coming in, and no selection in the mux itself. How do they choose which one is active?Turns out, they abuse the ROM structure itself and use the same transistor structures to choose the active bit line. Observe how the top 6 word lines form a binary pattern: 4, 2, 1 and their complements.
(DIR) Post #B32hg1Hf1NSrxIGPCq by infosecdj@infosec.exchange
2026-02-06T09:10:57Z
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Another interesting structure is the data bus driver. There are two instances of this exact circuit on the die. Effectively this is 8x a NOR2 with a large pull-down transistor, and one inverter (at the right) driving the common enable signal.
(DIR) Post #B32hg7CuzvEiKK5heC by infosecdj@infosec.exchange
2026-02-06T09:19:03Z
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Since we have open-drain bus drivers, the bus must be either pulled up or precharged. Chasing down that circuitry was fun! It's here. See? There are 8 L-shaped transistors, split into groups of 5 and 3. As these are actively driven, I believe the bus is precharged.
(DIR) Post #B32hgDBilHqMsLZpc8 by infosecdj@infosec.exchange
2026-02-06T09:22:34Z
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Select all MOS transistors on this picture, click Skip if there are none... :D
(DIR) Post #B32hgJP3ec4q9RrZEe by infosecdj@infosec.exchange
2026-02-06T09:26:44Z
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Well, that's about it for this Friday. Hope you enjoyed this little foray into the ancient tech. Thank you for sticking until the end!Just wanted to thank my whole one patron for supporting my work. 🖤 I do this in my free time, and would appreciate any and all support is appreciated to offset the costs of samples and supplies. If you feel you could spare some cash in this economy, I'd be most thankful. Link in the profile!Have an absolutely beautiful Friday and a fantastic end of the week!/🧵