Post AkmdIv1Gy73abcZzG4 by jeremy_list@hachyderm.io
 (DIR) More posts by jeremy_list@hachyderm.io
 (DIR) Post #AkmdIv1Gy73abcZzG4 by jeremy_list@hachyderm.io
       2024-08-08T23:15:13Z
       
       0 likes, 0 repeats
       
       @Kroc I'm actually pretty curious about how software would handle having half the cores using a completely different instruction set.
       
 (DIR) Post #AkmdIvrNqMjzDExbU0 by thelastpsion@bitbang.social
       2024-08-09T07:25:54Z
       
       0 likes, 0 repeats
       
       @jeremy_list @Kroc From what I've seen so far, it's either-or. You can run dual-core ARM or dual-core RISCV. If I'm wrong and you can run some sort of hybrid... I guess you'd pick a "main" core and use that to control the other core?