Post AXgzvx8QmenPDch6FU by soller@fosstodon.org
 (DIR) More posts by soller@fosstodon.org
 (DIR) Post #AXgzvw0ayIvxj21KOe by soller@fosstodon.org
       2023-07-13T18:25:14Z
       
       0 likes, 0 repeats
       
       Thread about @system76 Virgo work (https://github.com/system76/virgo)In many motherboard designs, global labels are used heavily and this makes it difficult to swap components. Here, I will present an example of what we are trying to do to make the schematic design more modular, such that the CPU and components are connected through a small set of hierarchical labels (see the attached picture with the schematic design for Virgo's two M.2 SSD slots).1/6
       
 (DIR) Post #AXgzvx8QmenPDch6FU by soller@fosstodon.org
       2023-07-13T18:27:20Z
       
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       On the CPU side, a single unit is generated from a list of signals which contains most of the signals needed to connect a PCIe x4 device. We've paired a clock request with a set of signals, as this simplifies the firmware definition later.2/6
       
 (DIR) Post #AXgzvyAExPpyPWY3hw by soller@fosstodon.org
       2023-07-13T18:28:32Z
       
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       On the device side, we've connected all those relevant signals for the device to a KiCad bus, the same way they are connected on the CPU side.3/6
       
 (DIR) Post #AXgzw0164NiC9kHmjY by soller@fosstodon.org
       2023-07-13T18:30:34Z
       
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       By just connecting those two busses, we now have the right signals prepped for layout in the PCB editor.4/6
       
 (DIR) Post #AXgzw3Uz7iOyxJICEi by soller@fosstodon.org
       2023-07-13T18:32:23Z
       
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       Now the connections can be swapped as I lazily did here. Or the CPU generation can be updated. Or the CPU vendor can be switched. Or the connection can be used for a different kind of device (like a discrete GPU). Doesn't matter, that single line for the KiCad bus is a whole PCIe x4 connection!5/6
       
 (DIR) Post #AXgzw4rM41tFAylZk8 by soller@fosstodon.org
       2023-07-13T18:35:16Z
       
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       Now that I've swapped the two, I have the changes instantly available in the PCB editor (note the capacitors that the signals are coming from, now the upper row is going to the left instead of the right). NO schematic changes were required on either the CPU PCIe page or the M.2 slot page. This means these components can be shared across every PCB integrating them without changes!6/6
       
 (DIR) Post #AXgzw5ua9W48RHHfPc by soller@fosstodon.org
       2023-07-13T18:37:28Z
       
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       Mastodon really needs a way to plan threads. I'm done editing the posts now ;-)
       
 (DIR) Post #AXgzw6tuTV7dVTye0G by efyre@potate.space
       2023-07-13T18:42:34Z
       
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       @soller that or making it easier for servers admin to up the character limits
       
 (DIR) Post #AXgzw86M0ifdEMo62S by sarvo@novoa.nagoya
       2023-07-14T17:53:50.155Z
       
       1 likes, 0 repeats
       
       @efyre@potate.space @soller@fosstodon.org ir using pleroma/akkoma (like kernel.org does) or any other fediverse software without content limitations.
       
 (DIR) Post #AXh6YEd6moYUCtgH6e by efyre@potate.space
       2023-07-14T17:57:09Z
       
       1 likes, 0 repeats
       
       @sarvo @soller also that yeah