Post B96fwV1pSpM5WPSitE by r@glauca.space
 (DIR) More posts by r@glauca.space
 (DIR) Post #B96fv9BVC5BJU5LGIy by r@glauca.space
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       hi folxi'm attempting to set up a "proper community project" around these chinese AGM FPGA+MCU chipsi don't really know how to do this, so i'm just going to copy-pasta what i've seen other people doso, have:- a github org: https://github.com/prjpannotia- IRC: #prjpannotia on Libera- Discord, for some reason (not bridged): https://discord.gg/xyWeeBkMwR
       
 (DIR) Post #B96fvY6OYCx0lU92Jc by r@glauca.space
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       i also made the current work-in-progress code public: https://github.com/prjpannotia/project-pannotiathis can decode and re-encode a FPGA bitstream for the AG32VFxxx chipsit also has rustdoc documentation to explain architectural details of the chip (but this isn't currently built anywhere yet)unlike the other project that is ongoing *checks notes* simultaneously with mine, this project is _not_ vibe-coded, and i am trying my best to focus on actually _explaining_ things
       
 (DIR) Post #B96fvmCw6gVAVpJSSG by r@glauca.space
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       can i plz beg for some boosties? πŸ₯ΊπŸ‘‰πŸ‘ˆ
       
 (DIR) Post #B96fvn46uz2JAkBvKy by r@glauca.space
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       i think the next initial focus is going to be on brain-dumping reverse engineering notes, before even _we_ forgor them
       
 (DIR) Post #B96fw1p43CugwQGcT2 by r@glauca.space
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       RE notes for this chinese domestic FPGA+RISC-V are being collected here: https://github.com/prjpannotia/reverse-engineering
       
 (DIR) Post #B96fwCchtUZ4RHZPEW by r@glauca.space
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       in case anybody was wondering why vibe-coding some tools for this FPGA is... surprisingly easythe vendor data files define the structure of the bitstream using: a pile of CSVs: https://github.com/prjpannotia/reverse-engineering/tree/main/decoded/rodinia/confighence, _explaining_ this in a useful way (and upstreaming) are _way_ more difficult than "look, bits!"
       
 (DIR) Post #B96fwV1pSpM5WPSitE by r@glauca.space
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       oops, somehow created the repo as private