Post B6DjArlN2TVlpw91FY by mntmn@mastodon.social
(DIR) More posts by mntmn@mastodon.social
(DIR) Post #B6DjArlN2TVlpw91FY by mntmn@mastodon.social
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so far my (i think) worst, most time-wasting and most regrettable decision i made was to change SoC<->SC (System Controller) communication from UART to SPI a few years ago and now it's baked into all the things
(DIR) Post #B6DjNDgZMCoZIrn076 by mntmn@mastodon.social
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i don't know if it's possible to write any "normal" SPI communication code that works robustly under all circumstances. the pico-sdk spi_read implementation for example is flawed from the beginning and contains endless loops. the linux SPI subsystem is abstracted so much that it's almost impossible to make assumptions about its behaviour
(DIR) Post #B6DjWhY3hJO0WkKVU0 by mntmn@mastodon.social
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SPI is also weird because it's fundamentally structured such that it wants to write and read at the same time, and everyone is working against/around that by doing dummy reads and writes, sometimes with 0xff, sometimes with 0x00 etc
(DIR) Post #B6DjbbLqAKFCksx2e0 by mntmn@mastodon.social
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@tj all reform series devices and the processor modules have a SPI connection between LPC/SC and the SoC/CPU, for reform2_lpc driver
(DIR) Post #B6DjgARddA2GkoqATI by mntmn@mastodon.social
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@mnl i like i2c 1000x more, because it has less moving parts and seems more predictable
(DIR) Post #B6DjhULR81nWlKZNBo by jmax@mastodon.social
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@mntmn Yeah. It's really nice for the cases where you actually are reading and writing at the same time, but it gets weird otherwise.
(DIR) Post #B6DjvKLR6ZbdnnAUJE by 2003MugishaPhocit@mastodon.social
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@mntmn Is this a computer language?I am not exposed to SoC<->SC .Where is it applied?
(DIR) Post #B6DkaWX6h6U3TaGs5I by mntmn@mastodon.social
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anyway, i'll get it under control and just wanted to vent. but if you're ever in my shoes, UART is fine btw
(DIR) Post #B6Dklah5Z24rZCDWsq by valpackett@social.treehouse.systems
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@mntmn yeaah microsoft surfaces use uart for this!
(DIR) Post #B6DklarMwoIi551juK by mntmn@mastodon.social
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@valpackett aww, envious now
(DIR) Post #B6Dm6vcp2No0WExa5o by wolf480pl@mstdn.io
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@2003MugishaPhocitIt's about different electronic parts inside a laptop.AFAIU:SoC = "System on Chip", i.e. the main processor of a computerSC = "System Controller", i.e. a small always-on microcontroller that controls battery charging, fan speed, etc.@mntmn , when designing the Reform laptops, decided to connect these two chips using SPI interface, but now realizes using UART interface instead would've been a better idea
(DIR) Post #B6DmgQyuRoGju7Dnay by 2003MugishaPhocit@mastodon.social
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@wolf480pl @mntmn Thanks for the information but I cannot tell you that I have understood.I am deeply focused at food production to end hunger through donating food to the vulnerable families and communities in our region
(DIR) Post #B6DoN2aj6YnCfLn4Ns by swetland@chaos.social
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@mntmn My typical approach for Host<->MCU SPI is that the host posts messages to the MCU and simultaneously receives events/responses (if available). I like having a bit indicating to the MCU if a full read is being done or not. It does tend to have to be tailored to the limitations of the MCU's SPI block -- if you can arrange to send a fixed byte if not-ready that's useful to ensure a "busy" status is always sent when the MCU isn't ready, otherwise a READY MCU->Host GPIO may be safest.
(DIR) Post #B6Dob8omkbM0235ddg by swetland@chaos.social
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@mntmn @mnl I've never had anything but pain with I2C unless there are exactly and only two devices on the bus... and even then most hardware I've dealt with has had horrible I2C controller bugs where it randomly gets stuck, sometimes unrecoverably until reset.