[HN Gopher] Turbo9 - A Compact and Efficient Pipelined 6809 Micr...
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Turbo9 - A Compact and Efficient Pipelined 6809 Microprocessor IP
Author : PaulHoule
Score : 50 points
Date : 2024-05-28 14:39 UTC (8 hours ago)
(HTM) web link (github.com)
(TXT) w3m dump (github.com)
| vlowther wrote:
| Oooh. 6809 resurrection project. I studied that arch obsessively
| when I was a kid with a Tandy Color Computer.
| PaulHoule wrote:
| Funny I noticed this one when I was reading a paper about
| people using an OS-9 variant together with the Turbo9. See
| https://www.mdpi.com/2079-9292/13/10/1978
|
| I had a Coco 1 and a Coco 3, with the OS-9 operating system you
| could run C and Pascal compilers as well as use BASIC09 which
| was like a modern bytecode interpreted language (Python). The
| 6809 stands out because it was designed to support compiled
| languages, shared libraries and such. It not only had the right
| addressing modes but it had just enough registers that code
| generation was straightforward.
|
| When I replaced my Coco3 with a 286 machine I switched to
| hardware that was more than an order of magnitude faster but
| MS-DOS was a big step back from OS-9.
|
| Lately I have been obsessed with the lost 24-bit generation of
| micros and was quite delighted to discover the eZ80, would be
| nice to see the 6809 follow the same route but Motorola was too
| committed to the ultimately doomed 68k.
| cmrdporcupine wrote:
| I mean, was 68k really "doomed"? Millions of machines shipped
| with it, it went through like 6 generations (and then
| ColdFire), and it's still used in military hardware with new
| chips made for that industry, and its existence heavily
| influenced everything about the Unix environments & protocols
| we use today.
|
| It was a great ISA (though clearly completely different from
| the 6809), and these days big endian looks like a serious
| anachronism.
| PaulHoule wrote:
| Wasn't it the VAX that set the precedent for all the
| "32-bit" machines ever since?
|
| Every company that invested in it, however, had to either
| go out of business or switch to another architecture,
| usually the first. Apple and Sun Microsystems survived.
| Fragmentation, with the Apple Macintosh, Amiga, Atari ST,
| Sinclair QL, etc. (all similar machines that struggled with
| cost-performance tradeoffs in different ways), didn't help.
|
| The BBC Micro developers probably had more space to really
| think about how to make a home computer and looked at many
| architectures and came to the conclusion that the 68k line
| punched below its weight. People in the early 1980s didn't
| see that one of the greatest rugpulls in computing was
| coming and were blindsided by IBM "doing it again" by
| maintaining long-term software compatibility with the 8088
| and derivatives the way they did for the old 360...
| Companies that invested in the x86 didn't regret it, though
| many of them were crushed by an increasingly competitive
| market.
| cmrdporcupine wrote:
| I absolutely agree that Motorola fucked up bigtime with
| the 68k->88k->PPC transition. They listened to the
| pundits who said the CISC ISA couldn't scale, and then
| Intel proved that (mostly) wrong but it was too late for
| 68k/ColdFire then. The rug-pulling actually is probably
| in large part responsible for both Atari and Commodore
| just packing it in, and led to Apple being in the
| wilderness for a decade as they did the first of 3 ISA
| transitions for the Mac.
|
| Also yes the 68k was clearly a dog when it came to
| interrupt responsiveness and made no sense in home
| computers or video games, at least not until the '020.
|
| It was meant to be a bargain VAX. And that's why I say it
| was influential. A whole generation (X) of us grew up who
| could never hope (or care) to touch a VAX, but we had
| Atari STs, Amigas, etc at home, and were shelling into
| SunOS 68k boxes for fun or school etc. It lasted quite a
| while after VAX was a done deal, too.
|
| To me 68k _was_ the Unix workstation and hobbyist market
| and defined 32-bit ISAs as well. I never touched an x86
| until I could run Linux on it. I 've never learned or
| written x86 assembly seriously in my entire career
| despite writing (and enjoying) 6502 68k, ARM, MIPS,
| RISC-V, others
|
| Outside of the UK, ARM didn't play a role except for in
| some embedded stuff. Obviously that changed :-)
| mordechai9000 wrote:
| Me too! I remember laboriously typing in the demo program from
| "TRS-80 Color Computer Assembly Language Programming" and
| watching it bubble sort the text on screen by directly
| accessing video memory.
| yjftsjthsd-h wrote:
| So AIUI this is explicitly trying to be smaller than 32-bit
| RISC-V. And I can see that in the abstract, but I gotta ask: How
| much does it matter? My _very uninformed_ impression was that
| with current fabrication, RISC-V is already more than small
| enough (on-chip surface area) and cheap enough ($) that there 's
| not a lot of market for anything underneath it. Am I mistaken?
|
| (To be clear, I'd _like_ it to work, just questioning the
| economics.)
| cmrdporcupine wrote:
| Sometimes there doesn't need to be a "market", just an interest
| and passion.
|
| I think there's value in an open and modernized 8-bit MCU/MPU
| that isn't PIC or whatever.
| PaulHoule wrote:
| I love AVR-8 myself.
| garaetjjte wrote:
| It's really terrible that for cheap embedded cores things
| like 8051 are still being used, instead of sane
| architectures like AVR.
| PaulHoule wrote:
| I find it pretty scary that C compilers target the 8051
| but I also think C is a terrible waste of the AVR-8 (who
| needs to move the stack pointer around meaninglessly in a
| simple program where recursion is a problem and not a
| solution? Probably the best thing that happened in the
| 1970s was that Microsoft BASIC beat Lisp and Logo,
| otherwise a generation of people learning to code would
| have been victimized even more by bad Fibonacci
| implementations) which I only indulge in because I can
| port C code to a bigger microcontroller.
| cmrdporcupine wrote:
| Have you ever played with the Parallax Propeller MCUs? (I
| and II). 32-bit, but very "retro" feel to them. And an
| odd and interesting multicore architecture.
|
| Unfortunately they've had a bad streak in terms of
| getting a proper GCC or Clang toolchain targeted towards
| them. The developers of the chip are focused on their own
| weird structured BASIC-Assembly fusion ("SPIN").
| MisterTea wrote:
| They state this as their reasoning so there must be merit in
| pursuing a smaller footprint:
|
| > Current industry trends are to adapt 32-bit RISC IP for
| microcontroller use, however their large 32x32 register files
| and loosely encoded instructions limit their absolute minimum
| footprint. So with the goal of a creating a performance and
| compact microprocessor IP, we need an 16-bit instruction set
| architecture (ISA).
|
| Not every application requires 32 bits and as you can see from
| some of the use cases, there might be a dozen of these in a
| design so minimal footprint is important.
| phone8675309 wrote:
| That's cool - the 6800 is getting its equivalent of the 65816
| cmrdporcupine wrote:
| skimming, it looks limited to 16-bit memory addressing, so not
| really equiv unfortunately.
|
| '816 was a gross hack, but it at least let you get more memory
| on there without resorting to bankswitching
| PaulHoule wrote:
| Kinda awful because it doesn't have 24 bit index registers so
| writing programs that use the whole memory is a hassle. I
| remember people complaining a lot about messing with the
| segment registers in the 8086|8088 which was worse than
| having a flat memory space but really wasn't that bad, you
| could always find a memory model that worked for your
| application and I really enjoyed writing 80286 assembly.
| cmrdporcupine wrote:
| yeah this is always my bitch with the 816. there's no way
| to have a "pointer" in a register as a single value.
|
| that and the stupid mode switching
|
| oh, and stack and zero page not being able move out of
| first bank
|
| not a compelling chip.
| jhallenworld wrote:
| Interesting that there is no cache (instead it's using a prefetch
| queue).. "Implement multi-cycle to reduce area / power", I guess
| it's not one-cycle per instruction, so maybe not needed.
|
| Well, where is the superscalar variant? :-) At least on an FPGA,
| there would be very diminishing returns for doing it. Even
| bypassing has bad effects on fMAX.
| PaulHoule wrote:
| Lately I've been curious about building things like display
| controllers and microprocessors on the FPGA. It was
|
| https://en.wikipedia.org/wiki/Transport_triggered_architectu...
|
| that convinced me I could build a useful custom processor but
| it also got me to see how complex things get when you go
| pipelined, superscalar, depending on a cache, etc.
| phendrenad2 wrote:
| Were any MMUs ever made for the 6809? Or could it use an MMU for
| the 8086 or something?
| pkaye wrote:
| Looks like there was one.
|
| http://www.bitsavers.org/components/motorola/_dataSheets/682...
| ddingus wrote:
| It's in the CoCo 3 and worked pretty well!
|
| Basically, it can page a couple of megabytes (maybe 4 I can't
| remember off hand) into and out of the 16 bit address space
| as 2, 4, 8Kb pages.
|
| The really nice thing is how well the 6809 can do relocatable
| code. Made paging things in to and out of RAM flexible.
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