[HN Gopher] TSMC 2nm Update: Two Fabs in Construction, One Await...
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TSMC 2nm Update: Two Fabs in Construction, One Awaiting Government
Approval
Author : ksec
Score : 121 points
Date : 2024-01-20 11:12 UTC (11 hours ago)
(HTM) web link (www.anandtech.com)
(TXT) w3m dump (www.anandtech.com)
| FirmwareBurner wrote:
| That means it should ease demand for the 3nm node so we can see
| more non-Apple chips on it?
|
| I'm just curious where'd does TSMC find free real estate in
| Taiwan for so many fabs. At this rate Taiwan will be all TSMC
| fabs.
| arccy wrote:
| for the amount of money they make in the relatively small
| footprint, sacrificing a scrap of farmland is always worth it
| FirmwareBurner wrote:
| You need a lot more than scrap farmland. The amount of water
| semi fabs consume is insane, and Taiwan doesn't have abundant
| clean water sources.
| audunw wrote:
| Relevant Asianometry video:
| https://www.youtube.com/watch?v=C3RzODSR3gk&t=2s
|
| TSMC is working to bring water consumption down, but yeah,
| the water consumption is still critical
| 15155 wrote:
| Aren't most modern fabs re-using over 90% of their water?
| creer wrote:
| At the same time, you would think by now there would be
| better planning - preserving useful farming soil for farming.
| But yeah, the difference is too high for most places to
| bother. In any country I know of.
|
| It's fair also that some farming activity is not very
| compatible with high human density nearby, such as spraying
| and dust. So it's hard to intersperse high rises with
| production farmland.
| ytch wrote:
| https://focustaiwan.tw/business/202311100005
|
| > At this rate Taiwan will be all TSMC fabs.
|
| It's almost in every big cites, but there are still some
| regions in Taiwan that don't welcome TSMC to set up factories.
| tyingq wrote:
| The headline here is verbatim from the story, but reads better as
|
| "TSMC 2nm Update: Two Fabs in Construction, Third Awaiting
| Government Approval"
| ramshanker wrote:
| I am surprised with the absence of Cerebrus style x64 or ARM or
| NVDA GPU chips on the leading nodes.
| ksec wrote:
| Providing a little more context before things get blow out of
| proportion.
|
| This is the first time TSMC has done two large feature set in one
| node generation. TSMC's N2 will first use gate-all-around (GAA),
| with an improved N2P coming with BackSide Power Delivery Network
| (BSPDN).
|
| As with any new large node features, capacity will be
| constrained, so instead of the usual one additional Fab online
| per year expansion in leading node, they are bringing online 3 in
| the space of 2 years. This is also discounting that we dont know
| the total Wafer output of each Fab. But if we look at the recent
| Q4 report it does seems HPC ( or likely AI ) has infinite
| appetite for wafer capacity. So I wont be surprised if it is
| indeed a substantial increase in wafer capacity on leading node.
|
| We will know ( or we can infer it ) once they start doing 2nm
| revenue reporting. TSMC tends to be very transparent with these
| sort of things. Something I hope Intel IFS will copy as well.
| wslh wrote:
| Could you please elaborate for the general HN public what TSMC
| is doing and how they are advancing too fast while Intel (also
| AMD?) are "stagnated"? I am not talking about bashing Intel but
| it seems there is a lot to talk about TSMC from the science,
| engineering, and business execution perspectives. It seems like
| TSMC is playing a complete new game in the chip industry.
| cma wrote:
| Engineering wise Intel was part of EUV LLC in the late 90s
| but sold off their portion later in the 2000s I believe. It
| was a public/private partnership to develop EUV lithography
| and is the reason the US is able to dictate EUV machines not
| go to China.
| wslh wrote:
| How is your answer connected with my question?
| cma wrote:
| They did some of the engineering behind the fundamental
| tech but later dissociated from it, then later didn't
| invest in buying and integrating it (EUV machines) when
| it was on the verge of production and missed out. I
| believe their first in-house fabbed chips with EUV only
| released within the last month or so, Meteor Lake.
|
| It takes ~3 years to stand up a fab and has only been 5-6
| since EUV was proved out with first mass production.
| refulgentis wrote:
| Trying to ELI5-style compress an answer to 'explain the
| chip industry' means you have to be _very_ opinionated in
| a way that 's uncomfortable, and the way the question was
| framed, part of the answer will sound wrong to you.
|
| TL;DR: TSMC bet on a particular manufacturing method
| (EUV), and it paid off. The company that makes the
| machines for that method is absurdly backordered. Also,
| people way overrate how ahead TSMC was/is, there was a
| halycon moment where Apple went ARM on desktop _and_ had
| exclusivity on TSMC's best node improvement in years.
| People were doing Apple's to oranges, ascribing the
| improvements from the die shrink to Apple's genius /
| TSMC's manufacturing. For verification dig into Apple
| community's in-depth reaction to recent M3 release,
| you'll find the take is generally def. not worth the
| upgrade if you have M2.
| brudgers wrote:
| If you are interested in a lay view of the semi-conductor
| industry, I suggest the rabbit-hole of Asianometry's back
| catalog.
| mschuster91 wrote:
| > Could you please elaborate for the general HN public what
| TSMC is doing and how they are advancing too fast while Intel
| (also AMD?) are "stagnated"?
|
| AMD hasn't stagnated, they've made some serious progress in
| the last years, and they've long ago gone fabless - they spun
| off GlobalFoundries in 2009, and mostly deal with TSMC. The
| biggest problem AMD has when compared to anything ARM is the
| instruction set - x86 carries _a crapton_ of baggage with its
| 40-ish years of history and backwards compatibility, while
| ARM is relatively clean.
|
| Intel stagnated because they messed up big with their node
| shrinking and for inner-political reasons couldn't say they
| go with TSMC as well so they were stuck with their old nodes.
| fifteen1506 wrote:
| Completely ignorant of hardware here.
|
| That's why, I guess, they're looking to standardize x86s.
| huijzer wrote:
| By "new game" you mean what they have been doing for 30
| years?
| Culonavirus wrote:
| No, he means that it did not use to be like this. Not even
| a decade ago Globalfoundries and Intel had competitive,
| production-ready nodes (~14nm).
| sroussey wrote:
| TMSC went all in on new tech from ASML where Intel and
| Global Foundries said it was too expensive.
|
| Intel in particular was finding ways to get older stuff to
| work for newer nodes but it also had drawbacks. And Intel
| had dividends to pay.
|
| Now Intel is ordering the newest equipment, but hasn't
| build up the experience with it. Yet.
| bee_rider wrote:
| TSMC only does fabrication, no chip design. Pretty much
| everyone making high-performance parts other than Intel sends
| uses them, AMD included. This is typically known as the
| "foundry" business. They are the biggest pure foundry by far,
| and all of their competition has some downside (Intel and
| Samsung aren't pure foundries, you have to compete with their
| in-house demand, Global Foundries is behind and isn't
| competing for the smallest nodes anymore, and SMIC is a
| state-owned Chinese company and, among the other concerns
| that brings up, they can't get access to the latest
| photolithography machines for geopolitical reasons).
|
| Speaking of politics TSMC, is in a unique geopolitical
| position. Their government sees being the chip foundry for
| the whole world as an existential issue. China would like to
| take over Taiwan for historical reasons, and they can't
| possibly build a large enough army to defend themselves
| against a really motivated full-strength attack. So instead
| they have put themselves in a position where any attack would
| be incredibly disruptive to the global economy and anger
| everybody.
|
| The silicon industry is famous for very long roadmaps, very
| long investment payback times, cyclic demand, and winner-
| take-all competition. It is brutal. TSMC, serving everyone
| and with a friendly government at their back, is in a good
| position to out-endure everyone.
|
| That's the business part. The science and engineering is over
| my head, and I think sort of hard to talk about. Each node is
| a new engineering marvel basically.
| cubefox wrote:
| I think it's pretty clear that the importance of TSMC will
| decline at the same rate as the price per transistor
| decreases ever more slowly. Chip companies don't need the
| most recent node when it offers hardly any improvement per
| cost.
|
| The slower the progress, the easier it is for competitors
| to catch up "close enough". Currently being two years
| behind the bleeding edge makes a significant difference,
| but not as much as ten years ago, and probably more than a
| few years from now.
| dv_dt wrote:
| I don't think that's clear at all. All I've seen is many
| small fabs closing down were close enough to bleeding
| edge wasn't sustainable. Intel is only surviving its last
| (and current?) fumble because of their past lead.
|
| Though maybe I'm just out of the loop? who are the
| accessible close enough competition that you have in
| mind?
| Dalewyn wrote:
| The writing is indeed on the wall for TSMC's (and
| consequently Taiwan's) political value.
|
| The entirety of the western world has made it clear, with
| cold hard cash and sheer political will, that they want
| out of the singular egg basket that is Taiwan.
|
| Noone wants to be in the path of the inevitable freight
| train that is One China(tm).
| bee_rider wrote:
| We're both moving at the same time of course, the US has
| a huge amount of resources, so I'm sure if we had, say, a
| decade long really focused manufacturing-based economic
| policy there's nothing they could do to keep us from
| taking the crown.
|
| Alternatively if we catch a unicorn and contact some
| aliens maybe they'll tell us how to make CPUs out of the
| horn.
| bee_rider wrote:
| People like to buy the best chip, being in the "best"
| position has a advantage in-and-of-itself I think.
|
| If the field actually stagnates for good, yeah, they'd
| have to pivot I guess. We'll see if/when it happens.
| prng2021 wrote:
| Actually, isn't it quite clear that the complete opposite
| of what you said is true? TSMC's importance is at an all
| time high right now even though, as you said, being 2
| years behind doesn't make as much a difference as it did
| 10 years ago.
| AnthonyMouse wrote:
| TSMC's importance is at an all time high because they're
| finally in the lead, which wasn't true 10 years ago, when
| it was Intel.
| amelius wrote:
| > It is brutal.
|
| Makes me wonder. At what point will Apple try to build/buy
| their own foundry?
| alwillis wrote:
| There's no need for Apple to buy a foundry when they can
| afford to purchase virtually all of TSMC's capacity for
| any new chip process.
| samstave wrote:
| Apple is exactly like the CCP; It has a 10, 25, 50 year
| roadmap that it secretly works on.
|
| Recall that famous article about the "largest hedge fund
| nobody has heard about" -- Apples hedgies that were a
| couple of people in Reno Nevada?
|
| Surely they have been looking at the math forever - I
| wouldnt be surprised if they have already pulled the
| trigger on something.
|
| However, they are masters of supply chain - and were
| investing in companies that are inputs to their supply
| chain, and rig the system for their own margins.
|
| They would buy up a companies capacity for a component,
| and invest in them, and basically own that node in the
| chain.
|
| With Ruthless brilliance.
| bee_rider wrote:
| Never say never but I suspect they are quite happy with
| the current setup. Apple makes premium devices. Everybody
| needs a mix of chips but their needs skew toward the
| newest node. They can instead pay TSMC a bunch of money
| to reserve capacity on the next node, funding the
| construction of the facilities, in exchange for a spot at
| the front of the queue. Then, when the node after that
| shows up, they can move along, and TSMC can continue
| using it for lower-margin companies.
| toast0 wrote:
| IMHO, it's better for Apple to be a foundary customer
| than to run an internal foundary.
|
| As a customer, if TSMC falters, they can switch to
| Samsung or Intel (if Intel foundary materializes).
|
| As a vertical foundary, it's very hard to switch if it
| falters. AMD managed to spin out their foundry which was
| becoming non-competitive and switch to TSMC, Intel has a
| lost decade because of the pipeline bubble caused when
| the Intel 10nm foundary arrived late and with poor
| yields.
|
| Apple has a very hard time selling to business, and I
| think would not be able to credibly provide foundry
| services to others, so it only works if they can keep it
| on the leading edge.
| Tempest1981 wrote:
| Asked here recently:
|
| https://news.ycombinator.com/item?id=35665076
| blackoil wrote:
| Intel plans to launch 20A(~2nm) by end of year or early next
| year.
| agd wrote:
| > Intel (also AMD?) are "stagnated"
|
| Intel are catching up and will likely launch their 20A node
| before TSMC 2nm. Intel's 20A also includes gate all around
| and backside power delivery, so I don't think it's accurate
| to say Intel are 'stagnated' any more.
| mdasen wrote:
| According to Intel's schedule, yes. Intel's schedule has
| 20A coming in Q3 2024.
|
| However, according to Intel's schedule, they've been at
| Intel 3 since Q3 2023 (and Intel 4 since Q3 2022). The
| first Intel 4 processors actually launched in December
| 2024, 17 months after Intel 4 on their roadmap. We've yet
| to see any Intel 3 processors. I'm not accusing Intel of
| lying. Their roadmap can be when they've achieved a
| milestone rather than having it at the scale to start
| shipping chips. To be realistic about Intel's roadmap, 20A
| processors are probably coming in December 2025 at the
| earliest. That is earlier than TSMC's 2nm with gate all
| around and backside power delivery, but then there's also
| the question of whether Intel will actually pull it off.
|
| I do like that Intel is recommitted to its fab, but I'd
| also say that it's too soon for me to believe that Intel
| will overtake TSMC. Why? Intel 4 is behind TSMC's N5
| process in transistor density and Intel has only shipped a
| single line of processors with it - and they've had to use
| TSMC's N5 and N6 for the graphics and IO tiles. Basically,
| Intel has started shipping Intel 4, but not for most of
| their processors - none of their desktop or datacenter
| processors are using it.
|
| There is a possibility that Intel will pull it off and I
| agree that Intel isn't stagnating anymore, but I'm not sure
| I'd go as far as saying it's "likely" that Intel will
| overtake TSMC. Yes, TSMC is still struggling to get 3nm
| beyond Apple. Qualcomm's upcoming 2024 flagship chips are
| using TSMC N4P. But while Intel has been making progress
| way faster than it had for a decade, their progress hasn't
| been as stellar as their marketing of it. Intel 4 doesn't
| match 5nm transistor density, Intel 3 still seems to be a
| mystery, and Intel is shipping few Intel 4 processors. Does
| Intel 20A end up falling between TSMC's N4 and N3P? Does
| Intel ship one processor at very low volume with 20A in
| December 2025 and it's late 2026 or even 2027 before
| they've got all their processors there?
|
| It just the kind of situation where there's a lot of nuance
| because it doesn't matter what a company has "achieved". It
| matters what parts you can buy and at what price. I can get
| Apple products with 3nm, but it looks like Android devices
| won't be getting 3nm until 2025. That's available, but not
| to most people. Even if Intel "achieves" 20A: at what
| volume, at what transistor density?
| sylware wrote:
| As you said N2 seems to be some sort of major milestone... and
| why 3 fabs? Well, I would naively say that will help TSMC
| production capacity to avoid being "trusted" by a few vendors
| and let alternatives access state-of-art N2... finally risc-v
| powerful micro-archs with N2?
| hyperthesis wrote:
| Since _nm_ are Now Marketing, unrelated to physical dimension,
| how consequential is this node shrink? It must have passed some
| threshold to justify new factories - what was it?
| nightski wrote:
| Would it make a difference if it was physical dimension?
| Wouldn't you simply be asking the same question?
| ip26 wrote:
| I have no inside information, but gate-all-around and
| backside power are both pretty big developments. If you
| remember the rise of finfet, gate-all-around will probably be
| a similar step up (maybe slightly smaller). My guess is
| backside power is the less impactful of the two, and a little
| less directly quantifiable, but for route-limited designs it
| should enable 10-20% higher density which reduces cost and
| improves performance. It may also deliver higher quality
| power supplies, which improves power efficiency and maximum
| clock frequency.
|
| It's hard to directly answer "how consequential", but it
| seems like it could be as significant as the step to TSMC
| 16nm.
| samstave wrote:
| I didnt know what GAA was, bard says this:
|
| --
|
| Gate-all-around (GAA) is a revolutionary new approach to
| chip manufacturing that promises to push the boundaries of
| transistor miniaturization and performance. It represents
| the next step after FinFETs, the current dominant
| transistor architecture used in most modern processors.
|
| Here's what GAA means in chip manufacture:
|
| *Concept:*
|
| * Imagine a tiny transistor, the fundamental building block
| of a chip, not as a flat, rectangular structure, but as a
| nanowire wrapped in a gate material on all sides. That's
| essentially what GAA is. [Image of GAA transistor
| structure]
|
| * This surrounding-gate design offers several advantages
| over FinFETs: * *Better control over the channel:* The
| gate's intimate contact with the channel on all sides
| allows for finer control over the flow of electrons,
| leading to improved transistor performance. * *Smaller
| footprints:* GAA transistors can be made even smaller than
| FinFETs while maintaining or even enhancing performance.
| This allows for packing more transistors into a chip,
| leading to denser and more powerful processors. * *Lower
| power consumption:* Due to tighter control over the
| channel, GAA transistors can operate at lower voltages,
| resulting in reduced power consumption and heat generation.
|
| *Benefits:*
|
| GAA technology promises significant benefits for various
| applications:
|
| * *Mobile devices:* Smaller, more powerful processors for
| smartphones, tablets, and other mobile gadgets. *
| *Computers:* Faster, more efficient CPUs and GPUs for
| laptops, desktops, and servers. * *Artificial
| intelligence:* More powerful AI chips for faster training
| and inference in AI applications. * *Internet of Things
| (IoT):* Smaller, more energy-efficient chips for connected
| devices in the IoT.
|
| *Challenges:*
|
| Despite its potential, GAA technology faces several
| challenges:
|
| * *Manufacturing complexity:* The intricate 3D structure of
| GAA transistors makes them more challenging and expensive
| to manufacture than FinFETs. * *Material constraints:* Some
| GAA designs require exotic materials like III-V
| semiconductors, which are more difficult and expensive to
| work with than silicon. * *Standardization:* The industry
| is still in the early stages of developing GAA standards,
| which could lead to compatibility issues in the future.
|
| *Future of GAA:*
|
| Despite the challenges, GAA technology is seen as the
| future of chip manufacturing. Major chipmakers like TSMC,
| Samsung, and Intel are investing heavily in GAA research
| and development, and the first commercially available GAA
| chips are expected to hit the market in the next few years.
|
| *In summary, GAA is a game-changing technology that has the
| potential to revolutionize the chip industry. By offering
| smaller, faster, and more efficient transistors, GAA
| promises to power the next generation of electronic
| devices.*
| zozbot234 wrote:
| Good parrot. But how do I know that it didn't make some
| of that up?
| samstave wrote:
| It might take an electron microscope to see exactly whats
| going on
| prng2021 wrote:
| "In July 2022, TSMC announced that its N2 process technology
| will feature backside power delivery and will offer 10-15%
| higher performance at iso power or 20-30% lower power at iso
| performance and over 20% higher transistor density compared
| to N3E"
|
| https://en.m.wikipedia.org/wiki/2_nm_process
| audunw wrote:
| > Since nm are Now Marketing, unrelated to physical dimension
|
| That's not entirely true. They might not decrease the minimum
| gate length, but generally the improvements made when bumping
| down the "nm" number has been a similar improvement as what
| making the gate length smaller would have given. So I don't
| find the numbering as misleading as others think.
|
| It's not like any of us a designing gate cell libraries
| (well, I have, a very basic one, but I'm guessing most here
| haven't), and actually care about the gate length.
|
| Using the minimum gate length as a naming scheme was _always_
| been a proxy for things chip designers actually care about:
| logic density, timing, power, etc.
| phatfish wrote:
| Marketing sure painted themselves into a corner on this one
| by counting backwards, they only have one generation left
| before things get weird. Will they use fractions or go
| negative?
| Ciantic wrote:
| > "it usually builds a new fab to meet demand of its alpha
| customers and then either adds capacity by upgrading existing
| fabs or building another facility. With N2 (2nm-class), the
| company seems to be taking a slightly different approach as it is
| already constructing two N2-capable fabs and is awaiting for a
| government approval for the third one."
|
| Customers would probably want to have plants outside of Taiwan,
| but proactively approving a new plant and starting to build one
| even before you have customers gives more leverage to Taiwan.
| This is just as much about Taiwan's security as it's about good
| business.
| samus wrote:
| The fabs don't really have strategic value because the pace of
| development has slowed down. The fabs are presumably rigged for
| easy sabotage, so if something... happens to Taiwan, neither
| China nor the West can make use of them. It would barely affect
| the state of the art since Samsung is not far behind and Intel
| will eventually get its sh*t together again. And key parts of
| the supply chain are in the West, and China's access to it is
| already restricted.
|
| Edit: they have massive economic value of course, but economic
| factors alone have rarely prevented conflicts.
| Snow_Falls wrote:
| If TMSC fabs go down, the world silicon foundry output would
| drop by a significant chunk. That could have an effect but
| the majority of the worlds silicon use is in less advanced
| nodes which many companies produce, it would slow down the
| state of the art sure, but it probably not be as catastrophic
| as some people imagine.
| kelipso wrote:
| Even if China invades Taiwan and no sabotage happens to
| TSMC, sanctions would mean TSMC won't produce anything for
| years, and during that time other companies will catch up.
| creer wrote:
| It's easy to dismiss economic impact in conflicts. Even the
| phrasing "economic factors alone have rarely prevented
| conflicts" is a little glib. US administrations (and all
| others) have to remember how the Cold War ended; The Oil
| Shock; the effect of fracking on the viability of action in
| the middle east (thrown together in one salad :-); the whole
| point of much conflict in the middle east; the Houthis firing
| at ships passing by; etc, etc.
|
| So not all conflict is tied-in with economics sure but
| wouldn't loosing most TSMC production and china-based supply
| chains be a major shock? For all sides? And as such would be
| taken into account?
| ijhuygft776 wrote:
| so, how many nanometers is 2nm?
| Snow_Falls wrote:
| If this isnt a joke, 2nm=2 nanometers.
| ijhuygft776 wrote:
| If this isn't a joke, you are wrong. What a world we live in.
|
| > Today, terms such as "2 nanometer" and "3 nanometer" are
| widely used as shorthand for each new generation of chip,
| rather than a semiconductor's actual physical dimensions.
|
| Its almost as if we live in 1984 where newspeak goes un-
| noticed
| Snow_Falls wrote:
| Oh! Do you mean how many actual nanometers a transistor
| made on a '2nm' process is?
| ijhuygft776 wrote:
| What I mean is: WTF, no one cares how many nanometers it
| is... why lie about it either way, anyways?
| bee_rider wrote:
| I think that's a popular sentiment, but we should all
| appreciate the person who answered your question as if it
| was good-faith, right? That's a good instinct for
| somebody to have.
| coltonweaver wrote:
| For those unaware, "2nm" is marketing-speak. The actual
| physical dimensions are 45nm gate pitch and 20nm tightest metal
| pitch for 2nm.
|
| https://en.wikipedia.org/wiki/2_nm_process
|
| https://www.pcgamesn.com/amd/tsmc-7nm-5nm-and-3nm-are-just-n...
| daxfohl wrote:
| Oh wow, so a 7 percent improvement, not 50 percent. I'd heard
| about the disparity, but didn't know it was that big.
| apienx wrote:
| Reminder that technology nodes (5nm, 2nm, etc.) refer to the
| smallest feature, not some dimension of the transistor channel.
| For reference, a silicon atom is 0.21nm.
| Snow_Falls wrote:
| They used to refer to the smallest features, but they haven't
| had any real meaning for a long time now. The names of the
| nodes don't correspond to any physical feature of the actual
| transistor anymore.
| bee_rider wrote:
| We should really measure this based on density for some basic
| repeated structure, or something like that. Adder-density or
| something, haha.
| audunw wrote:
| Who cares? It's not like most of us are designing logic gate
| cells for chips. The transistor dimensions are irrelevant to
| us.
|
| I really don't understand why this keeps getting brought up.
| It's not even an interesting fact.
|
| When the chip manufacturing industry started finding other ways
| to increase logic density, improve timing, reduce power
| consumption, etc, they just started bumping down the "nm"
| number to indicate the improved performance, in a similar way
| as reducing the transistor gate length would have done before.
| Simple as that.
| stephenitis wrote:
| Did ASML advance the technologies for this node?
|
| Who reserved all the expected output I wonder.
| nabla9 wrote:
| That must be something like 40-50 billion in investment.
| amelius wrote:
| Does anyone know of a good book on semiconductor physics and
| manufacturing that doesn't read like it was written in the 70s?
| gowings97 wrote:
| "But if we look at the recent Q4 report it does seems HPC ( or
| likely AI ) has infinite appetite for wafer capacity."
|
| Famous last words
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