Post B16wQqBZKBYSs7iMoy by mntmn@mastodon.social
 (DIR) More posts by mntmn@mastodon.social
 (DIR) Post #B16Zhm2NhdEZz3WScC by mntmn@mastodon.social
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       i'm looking for low-cost options to debug MIPI-DSI signals, a device that receives DSI and that i can poke for information (incl video timing and errors) about the video stream, either in place of a display or interposed. any ideas/experiences? thinking about crosslink NX dev boards (but never worked with crosslink) all the way to 1ghz-rate scope (or would i need 2ghz for ~800mhz dsi HS rate?) or LA and decoding on computer.
       
 (DIR) Post #B16Zpaa8B7oalt2FPs by mntmn@mastodon.social
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       the background is that we (with @ailurux) have all the code in place to drive our DSI displays in @barebox, and have combed through clocks etc comparing everything to linux, but it still doesn't work
       
 (DIR) Post #B16aHJnMBUnIohRaBk by dngrs@chaos.social
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       @mntmn hmm, @whitequark any ideas?
       
 (DIR) Post #B16bEokOkRMntnQoEq by mntmn@mastodon.social
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       @ailurux @barebox the motivation for doing is that if successful, we'll get a graphical boot menu/shell (provided by barebox, which is similar to but more linux-like than u-boot) on rk3588 pocket reform and dsi-based rk3588 classic reform. and it can potentially set up a framebuffer for non-linux OS to use.
       
 (DIR) Post #B16bLnb9Q2FcMVR2RM by mntmn@mastodon.social
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       @ailurux @barebox current hacking branch if someone wants to look for potential errors that we didn't catch yet https://source.mnt.re/reform/mnt-reform-barebox/-/tree/ailurux/panel?ref_type=heads
       
 (DIR) Post #B16bSKfPNpIgezXenw by mntmn@mastodon.social
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       @ailurux @barebox HDMI already works btw, so we know that the vop2/video pipeline works in general
       
 (DIR) Post #B16bgfcII02NglvDsG by mntmn@mastodon.social
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       @ailurux @barebox and we know that initial LP communication (DCS commands) work as well
       
 (DIR) Post #B16gw6Fa31gmPFTUEy by ignaloidas@not.acu.lt
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       @mntmn@mastodon.social ngscopeclient by @azonenberg@ioc.exchange has a decoder for MIPI DSI so with a suitable scope that should be a viable option?
       
 (DIR) Post #B16gw9xeFdinun7DqS by mntmn@mastodon.social
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       @ignaloidas yeah i think @azonenberg actually put the MIPI-DSI LP decoder in because i had this need a longer time ago :D
       
 (DIR) Post #B16jd81pVo2mHWgja4 by gbrnt@masto.hackers.town
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       @mntmn the firmware engineers at my work use crosslink and crosslink NX and definitely prefer the NX! Newer tooling. We haven't got a scope with the bandwidth for DSI so apparently the crosslink dev boards we built are really useful for validating that a SoC's DSI output is correct for us.But we've got both DSI source and sink on the same board and control software for both ends. So we don't actually need to be spec-compliant, just work ok!
       
 (DIR) Post #B16jd8seLQIKvLOuuW by mntmn@mastodon.social
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       @gbrnt interesting! for DSI input IP, is it included or expensive extra buy?
       
 (DIR) Post #B16wHc2wWYmaPjHOxk by whitequark@mastodon.social
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       @dngrs @mntmn 1.6 GHz bandwidth is a minimum per Nyquist, sampling rate generally has to be significantly higher than that (I'd expect 5-10 GHz to work?), plus you need a special probe just to capture the signals (cc @azonenberg); I would expect anything involving Crosslink to take a _massive_ amount of time
       
 (DIR) Post #B16wHdYWubdx5z48ps by mntmn@mastodon.social
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       @whitequark @dngrs @azonenberg thx especially for the crosslink judgement, that's kind of what i feared yeah
       
 (DIR) Post #B16wQlk7qHE55qqOUS by azonenberg@ioc.exchange
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       @whitequark @dngrs @mntmn 800 Mbps data rate is 400 MHz Nyquist bandwidth / 800 Msps minimum. I can't remember if the MIPI clock is half rate or full rate (which would require double the BW).You can actually run close to Nyquist with upsampling if you are just doing data recovery not SI work. I've decoded 25G NRZ with a 40 Gsps scope before, and on the extreme case 1.25 Gbps 1000Base-X (625 MHz Nyquist bandwidth) with a 2 Gsps scope.
       
 (DIR) Post #B16wQoGST2HGuhzFAG by whitequark@mastodon.social
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       @azonenberg @dngrs @mntmn oh you're right, I'm not really awake yet, oops
       
 (DIR) Post #B16wQovE1St4x93nhw by azonenberg@ioc.exchange
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       @whitequark @dngrs @mntmn Scope bandwidth also need not exceed Nyquist bandwidth as long as you have the sample rate and aren't too far down the rolloff of the antialiasing filter.I've decoded 10Gbase-R (10.3125 Gbps, 5.15625 GHz Nyquist BW) on a 4 GHz 40 Gsps scope.The eye looked like shit due to the lowpass filtering of the scope, but it was open enough you could tell an 0 from a 1 clearly.I wrote the ngscopeclient 10GbE decode that way lol.
       
 (DIR) Post #B16wQpYvdqe8wHdVaq by azonenberg@ioc.exchange
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       @whitequark @dngrs @mntmn This is very much an expert-level move and you need a pretty clean starting signal since you're effectively adding a lossy ISI channel in front of what's actually on the DUT.But thinking you need scope bandwidth > data rate as a hard rule *for decoding rather than SI work* is a gross oversimplification.
       
 (DIR) Post #B16wQqBZKBYSs7iMoy by mntmn@mastodon.social
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       @azonenberg @whitequark @dngrs i mean i don't need to decode the actual pixels, right. probably i can check if the line + frame rate makes sense even on the 200mhz scope. i'm a bit bummed now that i didn't pull the trigger on the "special 1ghz edition" rigol scope
       
 (DIR) Post #B17qjYzJ5Ih6T9U2Wu by 0h00000000@ioc.exchange
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       @mntmn I was able to debug DSI on. 350MHz scope. You may not be able to resolve the high speed data, but you can see the data streams start and stop and you can see the 10MHz data in LP mode. This was between a STM 32H7 and a 720p TFT display.I’m actually about to fab a board with Crosslink NX and MIPI in/out talking to a Alif MCU. I’ll have answers about IP next month.
       
 (DIR) Post #B18SglZNe5aWseRxTc by mntmn@mastodon.social
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       @0h00000000 thank you! looking forward to hear about the project!