----------------------------------------------------------------
|                                                              |
|                                                              |
|                    National Semiconductor                    |
|                                                              |
|          1      666       000      33333     22222           |
|         11     6         0   0    3     3   2     2          |
|          1    6         0   0 0         3        2           |
|          1    666666    0  0  0    33333      222            |
|          1    6     6   0 0   0         3    2               |
|          1    6     6    0   0    3     3   2                |
|         111    66666      000      33333    2222222          |
|                                                              |
|       NS16032 MICROPROCESSOR Instruction Set Summary         |
|                                                              |
|                    _________    _________                    |
|                  _|         \__/         |_                  |
|         <-- A22 |_|1                   48|_| Vcc             |
|                  _|                      |_                  |
|         <-- A21 |_|2                   47|_| A23 -->         |
|                  _|                      |_  ___             |
|         <-- A20 |_|3                   46|_| INT <--         |
|                  _|                      |_  ___             |
|         <-- A19 |_|4                   45|_| NMI <--         |
|                  _|                      |_  ___             |
|         <-- A18 |_|5                   44|_| ILO -->         |
|                  _|                      |_                  |
|         <-- A17 |_|6                   43|_| ST0 -->         |
|                  _|                      |_                  |
|         <-- A16 |_|7                   42|_| ST1 -->         |
|                  _|                      |_                  |
|       <--> AD15 |_|8                   41|_| ST2 -->         |
|                  _|                      |_                  |
|       <--> AD14 |_|9                   40|_| ST3 -->         |
|                  _|                      |_  ___             |
|       <--> AD13 |_|10                  39|_| PFS -->         |
|                  _|                      |_  ____            |
|       <--> AD12 |_|11                  38|_| DDIN -->        |
|                  _|                      |_  ___             |
|       <--> AD11 |_|12     NS16032      37|_| ADS -->         |
|                  _|                      |_    _             |
|       <--> AD10 |_|13                  36|_| U/S -->         |
|                  _|                      |_  __ ___          |
|        <--> AD9 |_|14                  35|_| AT/SPC <-->     |
|                  _|                      |_  ___ ---         |
|        <--> AD8 |_|15                  34|_| RST/ABT <--     |
|                  _|                      |_  __ ___          |
|        <--> AD7 |_|16                  33|_| DS/FLT <-->     |
|                  _|                      |_  ___             |
|        <--> AD6 |_|17                  32|_| HBE -->         |
|                  _|                      |_  ____            |
|        <--> AD5 |_|18                  31|_| HLDA -->        |
|                  _|                      |_  ____            |
|        <--> AD4 |_|19                  30|_| HOLD <--        |
|                  _|                      |_                  |
|        <--> AD3 |_|20                  29|_| BBG             |
|                  _|                      |_                  |
|        <--> AD2 |_|21                  28|_| RDY <--         |
|                  _|                      |_                  |
|        <--> AD1 |_|22                  27|_| PHI2 <--        |
|                  _|                      |_                  |
|        <--> AD0 |_|23                  26|_| PHI1 <--        |
|                  _|                      |_                  |
|            GNDL |_|24                  25|_| GNDB            |
|                   |______________________|                   |
|                                                              |
|                                                              |
|Written by     Jonathan Bowen                                 |
|               Programming Research Group                     |
|               Oxford University Computing Laboratory         |
|               8-11 Keble Road                                |
|               Oxford OX1 3QD                                 |
|               England                                        |
|                                                              |
|               Tel +44-865-273840                             |
|                                                              |
|Created        October 1982                                   |
|Updated        April 1985                                     |
|Issue          1.1                Copyright (c) J.P.Bowen 1985|
----------------------------------------------------------------
----------------------------------------------------------------
|Mnemonic       |Description                                   |
|---------------+----------------------------------------------|
|ABSi    g,g    |Take Absolute value                           |
|ABSf    g,g    |Take Absolute floating point value            |
|ACBi    s,g,d  |Add 4-bit Constant and Branch if non-zero     |
|ADDi    g,g    |Add                                           |
|ADDf    g,g    |Add floating point values                     |
|ADDCi   g,g    |Add with Carry                                |
|ADDPi   g,g    |Add Packed (BCD)                              |
|ADDQi   s,g    |Add Quick a 4-bit constant                    |
|ADDR    g,g    |Move effective Address                        |
|ADJSPi  g      |Adjust Stack Pointer                          |
|ANDi    g,g    |Logical AND                                   |
|ASHi    g,g    |Arithmetic Shift, left or right               |
|Bcc     d      |Branch on condition (cc)                      |
|BICi    g,g    |Bit Clear                                     |
|BICPSRi g      |Bit Clear Processor Status Register  (i=W/D #)|
|BISPSRi g      |Bit Set Processor Status Register    (i=W/D #)|
|BPT            |Breakpoint Trap                               |
|BR      d      |Branch (PC relative)                          |
|BSR     d      |Branch to Subroutine                          |
|CASEi   g      |Case (multiway branch)                        |
|CATSTn  g      |Custom Address Test (n=0-1)                (#)|
|CBITi   g,g    |Test and Clear Bit                            |
|CBITIi  g,g    |Test and Clear Bit Interlocked                |
|CCALnc  g,g    |Custom Calculate (n=0-3)                      |
|CCMPc   g,g    |Custom Compare                                |
|CCVnci  g,g    |Custom Convert custom value to integer (n=0-2)|
|CCV3ic  g,g    |Custom Convert integer to custom value        |
|CCV4DQ  g,g    |Custom Convert double to quad value           |
|CCV5QD  g,g    |Custom Convert quad to double value           |
|CHECKi  r,g,g  |Check index bounds                            |
|CMPi    g,g    |Compare                                       |
|CMPf    g,g    |Compare floating point values                 |
|CMPMi   g,g,d  |Compare Multiple: displacement bytes          |
|CMPQi   s,g    |Compare Quick with a 4-bit constant           |
|CMPSi   ol     |Compare Strings                               |
|CMPSTi  ol     |Compare Strings, Translating bytes            |
|COMi    g,g    |Complement all bits                           |
|CMOVnc  g,g    |Custom Move (n=0-2)                           |
|CVTP    r,g,g  |Convert to bit field Pointer                  |
|CXP     d      |Call External Procedure                       |
|CXPD    g      |Call External Procedure using Descriptor      |
|DEIi    g,g    |Divide Extended Integer                       |
|DIA            |Diagnose (hardware breakpoint)                |
|DIVi    g,g    |Divide, rounding down                         |
|DIVf    g,g    |Divide floating point values                  |
|ENTER   (rl),d |Enter procedure (save registers)              |
|EXIT    (rl)   |Exit procedure (restore registers)            |
|EXTi    r,g,g,d|Extract bit field (array orientated)          |
|EXTSi   g,g,m,m|Extract Short bit field                       |
|FLAG           |Flag trap                                     |
|FLOORfi g,g    |Convert f.p. to largest integer <= value      |
|FFSi    g,g    |Find First Set bit                            |
|IBITi   g,g    |Test and Invert Bit                           |
|INDEXi  r,g,g  |Recursive Indexing step for N-D arrays        |
|INSi    r,g,g,d|Insert bit field (array orientated)           |
|INSSi   g,g,m,m|Insert Short bit field                        |
|JSR     g      |Jump to Subroutine                            |
|JUMP    g      |Jump                                          |
|LCR     cr,g   |Load Custom Register                       (#)|
|LCSR    g      |Load Custom Status Register                   |
|LFSR    g      |Load Floating point Status Register           |
|LMR     mr,g   |Load Memory management Register            (#)|
|LPRi    ar,g   |Load dedicated Register      (a=PSR/INTBASE #)|
|LSHi    g,g    |Logical Shift, left or right                  |
|MEIi    g,g    |Multiply to Extended Integer                  |
|MODi    g,g    |Modulus (remainder from QUO)                  |
|MOVi    g,g    |Move a value                                  |
|MOVif   g,g    |Move an integer to a floating point value     |
|MOVf    g,g    |Move a floating point value                   |
|MOVFL   g,g    |Move and lengthen a floating point value      |
|MOVLF   g,g    |Move and shorten a Long floating point value  |
|MOVMi   g,g,d  |Move Multiple: displacement bytes             |
|MOVQi   s,g    |Move Quick and extend a 4-bit constant        |
|MOVSi   ol     |Move String                                   |
|MOVSTi  ol     |Move String, Translating bytes                |
|MOVSUi  g,g    |Move value from Supervisor to User space   (#)|
----------------------------------------------------------------
----------------------------------------------------------------
|Mnemonic       |Description                                   |
|---------------+----------------------------------------------|
|MOVUSi  g,g    |Move value from User to Supervisor space   (#)|
|MOVXiD  g,g    |Move with sign Extension to Double word       |
|MOVXBW  g,g    |Move with sign Extension Byte to Word         |
|MOVZiD  g,g    |Move with Zero extension to Double word       |
|MOVZBW  g,g    |Move with Zero extension Byte to Word         |
|MULi    g,g    |Multiply                                      |
|MULf    g,g    |Multiply floating point values                |
|NEGi    g,g    |Negate (2's complement)                       |
|NEGf    g,g    |Negate floating point value                   |
|NOP            |No Operation                                  |
|NOTi    g,g    |Logical NOT (LSB only)                        |
|ORi     g,g    |Logical OR                                    |
|QUOi    g,g    |Quotient (divide, rounding towards zero)      |
|RDVAL   g      |Validate address for Reading               (#)|
|REMi    g,g    |Remainder from QUO                            |
|RESTORE (rl)   |Restore general purpose registers             |
|RET     d      |Return from subroutine                        |
|RETI           |Return from Interrupt                      (#)|
|RETT    d      |Return from Trap                           (#)|
|ROTi    g,g    |Rotate, left or right                         |
|ROUNDfi g,g    |Round a floating point value to an integer    |
|RXP     d      |Return from External Procedure call           |
|Scci    g      |Save condition code (cc) as a Boolean value   |
|SAVE    (rl)   |Save general purpose registers                |
|SBITi   g,g    |Test and Set Bit                              |
|SBITIi  g,g    |Test and Set Bit Interlocked                  |
|SCR     cr,g   |Store Custom Register                      (#)|
|SCSR    g      |Store Custom Status Register                  |
|SETCFG  (o)    |Set Configuration register                 (#)|
|SFSR    g      |Store Floating point Status Register          |
|SKPSi   ol     |Skip over String                              |
|SKPSTi  ol     |Skip over String, Translating bytes           |
|SMR     mr,g   |Store Memory management Register           (#)|
|SPRi    ar,g   |Store dedicated Register     (a=PSR/INTBASE #)|
|SUBi    g,g    |Subtract                                      |
|SUBf    g,g    |Subtract floating point values                |
|SUBCi   g,g    |Subtract with Carry (borrow)                  |
|SUBPi   g,g    |Subtract Packed (BCD)                         |
|SVC            |Supervisor Call                               |
|TBITi   g,g    |Test Bit                                      |
|TRUNCfi g,g    |Truncate toward zero floating point to integer|
|WAIT           |Wait for interrupt                            |
|WRVAL   g      |Validate address for Writing               (#)|
|XORi    g,g    |Logical Exclusive OR                          |
|---------------+----------------------------------------------|
| CFG           |Configuration register (4-bit)                |
| EXTERNAL      |External link table entry                     |
| FP            |Frame Pointer register (32-bit, top 8 zero)   |
| INTBASE       |Interrupt Base register (32-bit, top 8 zero)  |
| MOD           |Module register (16-bit)                      |
| PC            |Program Counter (32-bit, top 8 zero)          |
| PSR           |Processor Status Register (16-bit)            |
| Rn or Fn      |General purpose Registers (32-bit, n=0-7)     |
| SB            |Static Base register (32-bit, top 8 zero)     |
| SP0 (SP)      |Supervisor Stack Pointer (32-bit, top 8 zero) |
| SP1 (SP)      |User Stack Pointer (32-bit, top 8 zero)       |
| TOS           |Top Of current Stack                          |
| US            |User Status (8-bit, bottom byte of PSR)       |
|---------------+----------------------------------------------|
| ar            |Dedicated reg. (SP/SB/FP/MOD/INTBASE/PSR/US)  |
| c             |Custom length (D/Q=double/quad word)          |
| cc            |(EQ/NE/CS/CC/HI/LS/GT/LE/FS/FC/LO/HS/LT/GE)   |
| cr            |Custom slave processor register               |
| d             |Displacement constant (8/16/32-bit)           |
| f             |Floating point length (F/L=standard/long)     |
| g             |General operand                               |
| i             |Integer length (B/W/D=byte/word/double word)  |
| m             |Implied immediate constant (8-bit)            |
| mr            |Memory management status/control register     |
| n             |Digit                                         |
| o             |Options (B/U/W=backward/until/while)          |
| ol            |Option list (C/M/F/I=custom/MMU/FPU/interrupt)|
| r             |General purpose register (R0-R7/F0-F7)        |
| rl            |General purpose register list                 |
| s             |Short signed 4-bit value                      |
| #             |Privileged instruction                        |
----------------------------------------------------------------
