# ARM architecture

## Register usage

rSP = RSP
r10 = PSP
r9  = PS Top of Stack
r11 = A register
r8  = S register
r7  = pointer to SYSVARS

r0-r6 are generally free and used liberally across Dusk's ARM code. However, HAL
generates code that uses r0 and r1 as temporary values. Those values are never
used beyond the scope of a single HAL operation. Therefore, if you mix and match
HAL and assembler, you don't have to preserve r0 and r1 in between HAL
operations. However, you can consider that all HAL operations destroy these
registers.

## Interrupt conventions

The kernel boots with all IRQ and FIQ disabled. If the system needs it, it needs
to enable them itself.

ARM has separate SP registers set up in IRQ and FIQ mode. Each system will
has to define where those stack live and set it up in "isrsave," (see
[doc/intr]). On ARM systems, saved registers will generally be r0 and r1 because
at least one register is needed to check on a memory address, and because HAL
code uses r0 and r1, well, we might as well save those two right away.
