needs tests/harness lib/str asm/m68kd
testbegin

create asmbuf 64 allot

: wbe!+ tuck wbe! 2+ ;
: chk"
  [rcompile] " asmbuf begin n< swap wbe!+ eol? until drop
  asmbuf to dpc ['] .stem capture #s[]= ;
: brchk" [rcompile] " ' to dpc ['] .stem capture #s[]= ;

\ NOTE: mnemonic alignment is required

\test basic + disassembling
chk"l add  %a6@,%d7" $de96
chk"l adda #4,%a6" $ddfc 0000 0004
chk"w cmpa #0,%a6" $bcfc 0000
chk"  rts  "  $4e75

\test effective addresses
chk"b move %d1,%d5" $1a01
chk"b move %a1,%d5" $1a09
chk"b move %a1@,%d5" $1a11
chk"w move %a1@+,%d5" $3a19
chk"w move -%a1@,%d5" $3a21
chk"w move %a1@(24),%d5" $3a29 $0018
chk"l move %a1@(%d3:w*4+12),%d5" $2a31 $340c
chk"l move %pc@(-4),%d5" $2a3a $fffc
chk"l move %pc@(%a7:l*8-2),%d5" $2a3b $fefe
chk"l move cafe:w,%d5" $2a38 $cafe
chk"l move deadfaf0:l,%d5" $2a39 $dead $faf0
chk"b move $42,%d5" $1a3c $ff42
chk"w move $1234,%d5" $3a3c $1234
chk"l move $12345678,%d5" $2a3c $1234 $5678

chk"w move %a1@(-8),%pc@(%d3:w*4+44)" $37e9 $fff8 $342c

\test branches
\ We put the "disp" word before _dummyword because on 8-bit signed displacement
\ is pretty tight and some CPUs are pretty wide in their binary code.
: disp current 2+ - $ff and or ;
code _dummyword
:~ ['] _dummyword disp ;
code _ $6000 ~ wbe,
brchk"b bra  `_dummyword" _

code _ $6100 ~ wbe,
brchk"b bsr  `_dummyword" _

code _ $6900 ~ wbe,
brchk"b bvs  `_dummyword" _

\test addq and subq
chk"w addq #3,%d4" $5644
chk"l subq #5,%a2" $5b8a

\test div.w and mul.w
chk"w divu -%a1@,%d3" $86e1
chk"w divs %a4@,%d1" $83d4
\ would be a division by %a0, hence not possible
chk"  ???? " $83c8
chk"w mulu -%a1@,%d3" $c6e1
chk"w muls %a4@,%d1" $c3d4

\test logic functions
chk"l or   %a6@+,%d7" $8e9e
chk"l and  %a6@+,%d7" $ce9e
chk"l eor  %d0,%d7" $b187

chk"l or   $cafebabe,%d7" $8ebc $cafe $babe
chk"l and  $00000008,%d7" $cebc $0000 $0008

\test mulx.l and divx.l
chk"l mulu %d6,%d5-%d7" $4c06 $7405
chk"l muls %a0@(12),%d5-%d7" $4c28 $7c05 $000c
chk"l mulu %a6@,%d7" $4c16 $7000
chk"l dvlu %a6@,%d5:%d7" $4c56 $7005
chk"l divu %a6@,%d5" $4c56 $5005
chk"l divs %a6@,%d2:%d3" $4c56 $3c02

\test moveq
chk"l movq #16,%d0" $7010
chk"l movq #-1,%d2" $74ff
chk"l movq #0,%d4" $7800
chk"l movq #127,%d5" $7a7f
chk"l movq #-128,%d7" $7e80

\test shifts and rotations
chk"l lsl  #3,%d1" $e789
chk"b lsr  #8,%d5" $e00d
chk"w asr  %d0,%d3" $e063
chk"w roxl #8,%d4" $e154
chk"w ror  %a5@" $e6d5
chk"w asl  42cafe42:l" $e1f9 $42ca $fe42

\test exg
chk"l exg  %d7,%d0" $cf40
chk"l exg  %a6,%a2" $cd4a
chk"l exg  %a3,%d5" $c78d

\test misc opcodes
chk"b slt  %a3@" $5dd3
chk"  stop $3829" $4e72 $3829
chk"l lea  %a0@(28),%a0" $41e8 $001c
chk"w swap %d3" $4843
chk"b tas  -%a3@" $4ae3
chk"  nop  " $4e71
chk"b addx -%a4@,-%a2@" $d50c
chk"l move %usp,%a1" $4e69
chk"l move %a1,%usp" $4e61
chk"w link %a3,#-15" $4e53 $fff1
chk"  unlk %a3" $4e5b

testend