.TH CDMGLOB 10.1
.SH NAME
cdmglob, cdmglob.errors \- expand circuit macros
.SH SYNOPSIS
.B cda/cdmglob
[
.B -L
] [
.B -f
] [
.B -k
] [
.B -v
] [
.I files
]
.PP
.B cdmglob.errors
.I error_file_from_cdmglob
.SH DESCRIPTION
.ds CD \s-2CDL\s0
.PP
.I Cdmglob
reads a circuit described in
\*(CD
from the specified files.
Macro calls are expanded and
pin numbers are substituted for pin names.
The expanded
\*(CD
is printed on the standard output.
The error output is used for diagnostics.
Note that names in \*(CD are restricted in length
so that care should be taken to keep macro names short.
The options available are:
.PD 0
.TP
.B -L
generates \s-2LSL\s+2 instead of \*(CD.
.TP
.B -
means standard input.
.PP
The
.B -f
option causes
macro calls to be recursively expanded in-line.
The
.B -k
option
causes shape instances
to be renamed to the name of the first actual output argument.
The
.B -v
option causes the name of the pin to be output on the line.
This is needed for
.IR annotate (10.1).
.SS "Macro Definitions"
A macro definition
corresponds to a file
containing
\*(CD.
The name of the file for a definition
.I d
is
.IB d .w\fR\|.\fP
Such
\*(CD
files may be produced using
.IR gnet (10.1).
Macros may have signal names as parameters.
These parameters are identified by a pin name.
The (set of) formal signal names associated with
the macro pin is replaced when the macro is called
with actual signal names, unless the
formal signal name is global.
In this latter case the actual and formal signal names
must be the same.
.SS "Macro calls"
A chip of type
.I d
is a macro call if the file
.IB d .w
exists.
If no such file exists,
the chip is assumed
to be primitive (as in, say,
.BR 74S181 ),
and if the type is surrounded by
.B <>
brackets, the
chip is an input output connector.
If
.IB d .w
exists
then it is the definition of the macro
.I d\|.
Signal parameters of the macro
are drawn in the same way
as signals are connected to a chip.
The pin name is the macro parameter name and
the signal is the actual signal parameter.
The name of the chip is interpreted as a macro name.
A given macro can be called more than once,
different instances being generated by different macro call names.
Macros may not be called recursively.
.SS Names
Signal, chip and pin names consist of
letters, digits and the characters
.BR +-/$ .
Names of individual signals in a bundle or of chips in a group
may also be generated:
.B name[ac-f]
generates
.BR "namea namec named namee namef" ;
.B name{a,c,d,e,f}
will do the same thing but can be longer than one character.
.B name<i:j>
generates
.BI name i
\&...
.BI name j
where
.I i
and
.I j
are represented in decimal as strings, all the same length.
Thus,
.B BUS01
(and not
.BR BUS1 )
is in the set
.BR BUS<0:15> .
.PP
The set of generated names can be separated by an amount
.B k
by writing
.B name<i:k:k>
and multiple indexing is allowed:
.BR name<i:j><p:q> .
Mixing the two generation methods is allowed.
.PP
Signal and chip names have scope local to
a macro definition unless the name contains a
.BR / .
A name containing a
.B /
is available throughout a circuit.
Connector names are also available throughout a circuit.
Signal and chip names used as formal parameters in
a macro definition are replaced during macro expansion
with the sequence of macro call names separated
by
.B /
and ending with the actual parameter signal name.
.SS "Name Matching"
The names of pins, signals and chips may also be generated
from patterns.
A pin pattern searches all pin names for the chip type.
Signal and chip patterns
search all signal or chip names.
Patterns have the following form.
.nf
	\fL*\fR	matches any sequence of characters
	\fL[...]\fR	matches any of the characters enclosed
	\fL[x-y]\fR	matches any character in the (ASCII) range \fLx\fR to \fLy\fR
	\fL?\fR	matches a single character
.fi
.SS "Signal Expansion"
A signal bundle may be connected
to one or more chips (or macro)
without having to write each chip or signal
explicitly.
In general each such array is expanded by generating
the specified set of names.
These names are then sorted alphabetically.
The first signal is connected to the first pin of the first chip.
Subsequent signals are connected to successive pins.
If no more pins exists then the first pin on the next chip is used.
The signal bundle must always end on the last pin of a chip
and there must be no signals unattached at the end.
.PP
.I Cdmglob.errors
takes the error output from
.IR cdmglob (10.1)
and finds the real error by looking into the offending
.B .w
files and prints the error on standard output.
.SH SEE ALSO
.IR annotate (10.1),
.IR cdl (10.6)