COMPONENT-NUMBERS

2708            8K (1K x 8) UV erasable PROM.
27128           27128A. Advanced 128K (16K x 8) production and UV erasable 
                PROMs.
2716            16K (2K x 8) UV erasable PROM.
27256           Advanced 256K (32K x 8) production and UV erasable PROMs.
2732            32K (4K x 8) UV erasable PROM.
27512           Advanced 512K (64K x 8) production and UV erasable PROMs.
2764            64K (8K x 8) UV erasable PROM.
27F64           64K (8K x 8) CHMOS flash memory.
27F64           64K (8K x 8) CHMOS flash memory.
2816            16K (2K x 8) electrically erasable PROM.
28F256          256K (32K x 8) CMOS flash memory.
4004            An early 4-bit microprocessor (circa 1971) by Intel.
4510            SCL4510B. CMOS BCD up/down counter.
4511            SCL4511B. CMOS BCD-to-7 segment latch/decoder/driver.
4514            SCL4514B. CMOS 4-to-16 line decoders with latch.
4515            SCL4515B. CMOS 4-to-16 line decoders with latch.
4516            SCL4516B. CMOS binary up/down counter.
4518            SCL4518B. CMOS dual up counters.
4520            SCL4520B. CMOS dual up counters.
4528            SCL4528B. CMOS dual monostable multivibrator.
4543            SCL4543B preliminary. BCD-to-7 segment latch/decoder/driver.
4581            SCL4581B. CMOS 4-bit arithmetic logic unit.
68020           A 32-bit microprocessor by Motorola (circa 1984); used in the
                original Apple Macintosh.
7400            LS00, S00. Quad 2-input NAND gate.
7401            74LS01. Quad 2-input NAND gate (Open Collector).
7402            LS02, S02. Quad 2-input NOR gate.
7403            S03. Quad 2-input NAND gate (Open Collector).
7404            LS04, S04. Hex inverter.
7405            LS05, S05. Hex inverter (Open Collector).
7406            Hex inverter buffer/driver (Open Collector).
7407            Hex buffer/driver (Open Collector).
7408            LS08, S08. Quad 2-input AND gate.
7409            74LS09. Quad 2-input AND gate (Open Collector).
7410            LS10, S10. Triple 3-input NAND gate.
74107           LS107. Dual J-K flip-flop
74109           LS109A. Dual J-K positive edge-triggered flip-flop.
7411            LS11, S11. Triple 3-input AND gates.
74112           74LS112, S112. Dual J-K edge triggered flip-flop.
74113           74LS113, S113. Dual J-K edge triggered flip-flop.
74116           Dual 4-bit transparent latch
7412            54/7412. Triple 3-input NAND gate.
74121           Monostable multivibrator.
74123           Dual retriggerable monostable multivibrator.
74125           LS125A. Quad 3-state buffer.
74126           LS126A. Quad 3-state buffer.
74128           Quad 2-input NOR buffer
7413            LS13. Dual 4-input NAND Schmitt trigger.
74132           LS132. Quad 2-input NAND Schmitt trigger.
74133           74S133. 13-input NAND gate
74134           74S134. 12-input NAND gate (3-state)
74135           74S135. Quad exclusive OR/NOR gate.
74136           74LS136. Quad 2-input exclusive-OR gate (Open Collector).
74137           54/74S137. 1-of-8 decoder/demultiplexer (with input latches).
74138           74LS138, S138. 1-of-8 decoder/demultiplexer.
74139           74LS139, S139. Dual 1-of-4 decoder/demultiplexer.
7414            LS14. Hex inverter Schmitt trigger.
74145           BCD-to-Decimal decoder/driver (Open Collector). See also BCD.
74147           10-line-to-4-line priority encoder.
74148           8-input priority encoder.
7415            54S/74LS15, 54LS/74LS15. Triple 3-input AND gate.
74150           16-input multiplexer.
74151           LS151, S151. 8-input multiplexer.
74153           LS153, S153. Dual 4-line to 1-line multiplexer.
74154           LS154. 1-of-16 decoder/demultiplexer.
74155           LS155. Dual 2-line to 4-line decoder/demultiplexer.
74156           LS156. Dual 2-line to 4-line decoder/demultiplexer (Open
                Collector).
74157           LS157, S157. Quad 2-input data selector/multiplexer (Non-
                inverted).
74158           LS158, S158. Quad 2-input data selector/multiplexer 
                (Inverted).
7416            Hex inverter buffer/driver (Open Collector).
74160           LS160A. BCD decade counter.
74161           LS161A. 4-bit binary counter.
74162           LS162A. BCD decade counter.
74163           LS163A. 4-bit binary counter.
74164           LS164. 8-bit serial-in parallel-out shift register.
74165           8-bit serial/parallel-in, serial-out shift register.
74166           8-bit serial/parallel-in, serial-out shift register.
74168           74LS168A, S168. 4-bit up/down synchronous counter.
74169           74LS169A, S169. 4-bit up/down synchronous counter.
7417            Hex buffer/driver (Open Collector).
74170           LS170. 4x4 register file (Open Collector).
74173           LS173. Quad D-type flip-flop with 3-state outputs.
74174           LS174, S174. Hex D flip-flops.
74175           LS175, S175. Quad D flip-flop.
74180           9-bit odd/even parity generator/checker.
74181           LS181, S181. 4-bit arithmetic logic unit.
74182           74S182. Lookahead carry generator.
74190           Presettable BCD/decade up/down counter.
74191           LS191. Presettable 4-bit binary up/down counter.
74192           LS192. Presettable BCD/decade up/down counter.
74193           LS193. Presettable 4-bit binary up/down counter.
74194           LS194A, S194. 4-bit bi-directional universal shift register.
74195           LS195A, S195. 4-bit parallel access shift register.
74197           74LS197. Presettable 4-bit binary ripple counter.
74199           8-bit parallel-access shift register.
7420            LS20, S20. Dual 4-input NAND gate.
7421            LS21, S21. Dual 4-input AND gate.
74245           74LS245. Octal transceiver (3-state).
7425            Dual 4-input NOR gate with strobe
74251           74LS251, S251. 8-input multiplexer (3-state).
74253           74LS253, S253. Dual 4-input multiplexer (3-state).
74256           74LS256. Dual 4-bit addressable latch.
74258           74LS258A, S258. Quad 2-line to 1-line data selector/
                multiplexer (3-state).
74259           74LS259. 8-bit addressable latch.
7426            LS26. Quad 2-input NAND gate (Open Collector).
74266           74LS266. Quad 2-input exclusive-NOR gate (Open Collector).
7427            LS27. Triple 3-input NOR gate.
74273           74LS273, S273. Octal D flip-flops.
7428            Quad 2-input NOR buffer.
74283           74LS283. 4-bit full address with fast carry.
74290           74LS290. Decade counter.
74293           74LS293. 4-bit binary ripple counter.
7430            LS30. 8-input NAND gate.
7432            LS32, S32. Quad 2-input OR gate.
7433            LS33. Quad 2-input NOR buffer (Open Collector).
74364           74LS364. Octal D flip-flop with 3-state outputs.
74365           74365A, LS365A. Hex buffer/driver (3-state).
74366           74363A, LS366A. Hex inverter buffer (3-state).
74367           74367A, LS367A. Hex buffer/driver (3-state).
74368           74368A, LS368A. Hex inverter buffer (3-state).
7437            LS37, S37. Quad 2-input NAND buffer.
74373           74LS373, S373. Octal transparent latch with 3-state outputs.
74374           74LS374, S374. Octal D flip-flop with 3-state outputs.
7438            LS38, S38. Quad 2-input NAND buffers (Open Collector).
7439            Quad 2-input NAND buffer (Open Collector).
74390           74LS390. Dual decade ripple counter.
74393           74LS393. Dual 4-bit binary ripple counter.
7440            LS40, S40. Dual 4-input NAND buffer.
7442            LS42. BCD-to-Decimal decoder. See also BCD.
7445            BCD-to-Decimal decoder/driver (Open Collector) See also BCD.
7446            54/7446A. BCD to 7-segment decoder/driver.
7447            54/7447A, 54LS/74LS47. BCD to 7-segment decoder/driver.
7451            LS51,S51.'51, 'S51 Dual 2-wide 2-input AND-OR-invert gate
                'LS51 Dual 2-wide 3-input, 2-wide 2-input AND-OR-invert gate.
7453            54/7453, 54H/74H53. '53 Expandable 4-wide, 2-input AOI gate.
                'H53 Expandable 2-2-2-3-input AOI gate.
7454            74LS54. 4-wide 2- & 3-input AND-OR-invert gate.
7464            74S64. 4-2-3-2-input AND-OR-Invert gate
7473            LS73. Dual J-K flip-flop.
7474            LS74A, S74. Dual D-type flip-flop.
7475            LS75. Quad Bistable Latch.
7476            LS76. Dual J-K flip-flop.
7483            LS83A. 4-bit full adder.
7485            LS85, S85. 4-bit magnitude comparator.
7486            LS86, S86. Quad 2-input Exclusive-OR gate.
7490            LS90. Decade counter.
7491            7491A. 8-bit shift register.
7492            LS92. Divide-by-twelve counter.
7493            LS93. 4-bit binary ripple carry.
7494            4-bit shift register.
7495            LS95B. 4-bit shift register.
7496            LS96. 5-bit shift register.
754             IEEE floating-point standard, developed in 1985 by a 
                committee of the institute of Electrical and Electronics 
                Engineers (IEEE), present a comprehensive specification for 
                the floating-point datatype, including formats, operations,
                roundoff, elementary functions, infinite and indefinite 
                numbers, and unnormalized representations.
80x86           family. The family comprising (as of 1990) the 8086, 8088, 
                80286, 80386, 80386SX and 80486 microprocessors.
80186           See iAPX 186.
80286           A 16-bit microprocessor (circa 1983) by Intel that has 
                the same CPU as the 8086 microprocessor, includes hardware 
                support for segmentation, and has a 24-bit physical-address 
                space; used in the IBM PC AT and many clones.
80287           An Intel arithmetic coprocessor for the 80286 microprocessor.
80386           A 32-bit microprocessor (circa 1986) by Intel that has a 
                32-bit physical-address space, hardware support for paging 
                and segmentation, and when operating in Real Address Mode 
                emulates the 8086 instruction-set architecture; used in the 
                IBM PS:2 Model 80 and many IBM PC clones.
80386SX         A 32-bit microprocessor (circa 1988) by Intel with the same 
                instruction-set architecture as the 80386 microprocessor, 
                a 16-bit (rather than 32-bit) data bus, and a 24-bit (rather 
                than 32-bit) physical-address space; used in several IBM PS/2 
                models and in many IBM PC clones.
80387           An Intel floating-point coprocessor for the 80386. 80-bit 
                CHMOS III numeric processor extension.
8041            8041A, 8641A, 8741A. Universal peripheral interface 8-bit 
                microcomputer. 
                        - 8-bit CPU plus ROM, RAM, I/O, timer and clock in 
                          a single package.
                        - one 8-bit status and two data registers for 
                          asynchronous slave-to-master-interface
                        - DMA, interrupt or polled operation supported
                        - 1024 x 8 ROM/EPROM, 64 x 8 RAM, 8-bit 
                          timer/counter, 18 programmable I/O pins
                        - fully compatible with all microprocessor families
                        - interchangeable ROM and EPROM versions
                        - 3.6 MHz 8741A-8 available
                        - expandable I/O
                        - RAM power-down capability
                        - over 90 instructions: 70% single byte.
8048            8048AH, 8035AHL, 8049AH, 8039AHL, 8050AH, 8040AHL. HMOS 
                single-component 8-bit microcomputer. 
                        - high performance HMOS II 
                        - interval timer/event counter
                        - two single level interrupts
                        - single 5-volt supply
                        - over 96 instructions; 90% single byte
                        - reduced power consumption
                        - compatible with 8080/8085 peripherals
                        - easily expandable memory and I/O
                        - up to 1.36 msec instruction cycle, all instructions 
                          1 or 2 cycles.
80486           A 32-bit microprocessor (circa 1989) by Intel with an 
                internal cache, support for floating-point arithmetic, and 
                an instruction-set architecture similar to that of the 80386; 
                used in many IBM PC clones.
8051            8-bit control-oriented microcomputer. 
                        - High performance HMOS process
                        - Internal timers/event counters
                        - 2-level interrupt priority structure
                        - 32 I/O lines (four 8-bit ports)
                        - 64K program memory space
                        - Boolean processor
                        - Bit-addressable RAM
                        - Programmable full duplex serial channel
                        - 111 instructions (64 single-cycle)
                        - 64K data memory space
                        - Security feature protects EPROM parts against 
                          software piracy.
8052            8052AH-BASIC.
                        - Full BASIC interpreter in ROM on a single chip
                        - BCD floating point math
                        - Generates all timing necessary to program EPROMS 
                          and EEPROMS
                        - Fast tokenized interpreter
                        - "Stand Alone" software development
                        - All arithmetic and utility routines can be called 
                          from assembly language
                        - Interrupts can be handled by BASIC or assembly 
                          language
                        - Built-in accurate REAL TIME CLOCK
                        - Multiple user programs
                        - Programs may reside in RAM, EPROM or EEPROM
                        - Built in radix convertion - hex to decimal and 
                          decimal to hex
80586           The projected successor to the 80486 microprocessor.
8080            8080A, 8080A-1, 8080A-2. An early 8-bit microprocessor 
                (circa 1974) by Intel, and predecessor of the Intel 80x86 
                family; used in the Altair 8800 personal computer. 
                        - TTL drive capability
                        - powerful problem solving instruction set
                        - 6 general purpose registers and an accumulator
                        - 16-bit program counter for directly addressing up 
                          to 64K bytes of memory
                        - 16-bit stack pointer and stack manipulation 
                          instructions for rapid switching of the program 
                          environment
                        - decimal, binary and double precision arithmetic
                        - ability to provide priority vectored interrupts
                        - 512 directly addressed I/O ports.
8085            8085AH, 8085AH-2, 8085AH-1. 8-bit HMOS microprocessors. 
                        - single +5V power supply with 10% voltage margins
                        - 3 MHz, 5 MHz and 6 MHz selections available
                        - 20% lower power consumption than 8085A for 3 MHz 
                          and 5 MHz 
                        - 100% compatible with 8085A
                        - 100% software compatible with 8080A 
                        - on-chip clock generator (with external crystal, LC 
                          or RC network)
                        - on-chip system controller; advanced cycle status 
                          information available for large system control
                        - four vectored interrupt inputs (one is non-maskable) 
                          plus an 8080A-compatible interrupt
                        - serial in / serial out port
                        - decimal, binary and double precision arithmetic
                        - direct addressing capability to 64K bytes of memory
8086            An early 16-bit microprocessor (circa 1978) by Intel and first 
                member of the 80x86 family of microprocessors; uses 
                segment-register addressing to support both a 20-bit 
                logical-address space and a 20-bit physical address; used in 
                the IBM PS/2 Model 25 and some PC clones.
                        - Direct addressing capability 1 MBytes of memory
                        - Architecture designed for powerful assembly language 
                          and efficient high level languages
                        - 14 word, by 16-bit register set with symmetrical 
                          operations
                        - 24 operand addressing modes
                        - Bit, byte, word and block operations
                        - 8 and 16-bit signed and unsigned arithmetic in 
                          binary or decimal including multiple and divide
8087            An Intel floating-point coprocessor for the 8086 and 8088 
                microprocessors.
8088            An Intel microprocessor with the same instruction-set 
                architecture as that of the 8086 but with a limited, 8-bit 
                data bus; used in the original IBM PC and in many clones.
                        - 8-bit data bus interface
                        - 16-bit internal architecture
                        - Direct addressing capability to 1 MBytes of memory
                        - Direct software compatibility with 8086 CPU
                        - 14-word by 16-bit register set with symmetrical 
                          operations
                        - Bit, byte, word and block operations
                        - 8 and 16-bit signed and unsigned arithmetic in 
                          binary or decimal including multiple and divide
8094            16-bit microcontroller.
                        - 839X: an 809X with 8K bytes of on-chip ROM
                        - High speed pulse I/O
                        - 10-bit A/D converter
                        - 8 interrupt sources
                        - Pulse-width modulated output
                        - Four 16-bit software timers
                        - 232 byte register file
                        - Memory-to-memory architecture
                        - Full duplex serial port
                        - Five 8-bit I/O ports
                        - Watchdog timer
8095            See 8094.
8096            See 8094.
8097            See 8094.
8155            8155H, 8155H-2. 2048-bit static HMOS RAM with no I/O ports 
                and timer.
                        - single +5V power supply with 10% voltage margins
                        - 30% lower power consumption than the 8155 and 8156
                        - 100% compatible with 8155 and 8156
                        - 256 word x 8 bits
                        - completely static operation
                        - internal address latch
                        - 2 programmable 8-bit I/O ports
                        - 1 programmable 6-bit I/O port
                        - programmable 14-bit binary counter/timer
                        - compatible with 8085AH, 8085A and 8088 CPU
                        - multiplexed address and data bus
8156            8156H, 8156H-2. 2048-bit static HMOS RAM with no I/O ports 
                and timer. See also 8155.
8185            8185, 8185-2. 1024 x 8-bit static RAM for MCS-85.
                        - multiplexed address and data bus
                        - directly compatible with 8085A and iAPX 88 
                          microprocessors
                        - low operating power dissipation
                        - low standby power dissipation
                        - single +5V supply
                        - high density 18-pin package
8202            8202A. Dynamic RAM controller.
                        - provides all signals necessary to control 2117 or 
                          2118 dynamic memories
                        - directly addresses and drives up to 64K bytes 
                          without external drivers
                        - provides address multiplexing and strobes
                        - provides a refresh timer and a refresh counter
                        - refresh cycles may be internally or externally 
                          requested
                        - provides transparent refresh capability
                        - fully compatible with INTEL 8080A, 8085A, iAPX 88 
                          and iAPX 86 family microprocessors
                        - decodes CPU status for advanced read capability 
                          with the 8202A-1 or 8202A-3
                        - provides system acknowledge and transparent 
                          acknowledge signals
                        - internal clock capability with the 8202A-1 or 
                          8202A-3
8203            64K dynamic RAM controller.
                        - provides all signals necessary to control 64K and 
                          16K dynamic memories
                        - directly addresses and drives up to 64 devices 
                          without external drivers
                        - provides address multiplexing and strobes
                        - provides a refresh timer and a refresh counter
                        - provides refresh/access arbitration
                        - internal clock capability with the 8203-1 and the 
                          8203-3
                        - fully compatible with Intel 8080A, 8085A, iAPX 88 
                          and iAPX 86 family microprocessors
                        - decodes CPU status for advanced read capability 
                          in 16K mode with the 8203-1 and the 8203-3
                        - provides system acknowledge and transfer 
                          acknowledge signals
                        - refresh cycles may be internally or externally 
                          requested (for transparent refresh)
                        - internal series damping resistors on all RAM outputs
8205            High speed 1 out of 8 binary decoder.
                        - I/O port or memory selector
                        - simple expansion - enable inputs
                        - high speed Shottky bipolar technology - 18 Ns max. 
                          delay
                        - directly compatible with TTL logic circuits
                        - low input load current - .25 mA max. 1/6 standard 
                          TTL input load
                        - minimum line reflection - low voltage diode input 
                          clamp
                        - outputs sink 10 mA min.
                        - 16-pin dual-in-line ceramic or plastic package
8206            Error detection and correction unit.
                        - detects all single bit and double bit and most 
                          multiple bit errors
                        - corrects all single bit errors
                        - syndrome outputs for error logging
                        - automatic error scrubbling with 8207
                        - expandable to handle 80-bit memories
                        - separate input and output busses - no timing 
                          strobes required
                        - supports read with and without correction, writes, 
                          partial (byte) writes and read-memory-writes
                        - HMOS III technology for low power
                        - 68 pin leadless JEDEC package
                        - 68 pin grid array package
82062           Winchester disk controller.
82064           CHMOS Winchester disk controller with on-chip error detection 
                and correction.
8207            Dual-port dynamic RAM controller.
                        - provides all signals necessary to control 16K, 64K 
                          and 256K dynamic RAMs
                        - directly addresses and drives up to 2 Mbytes 
                          without external drivers
                        - supports single and dual-port configurations
                        - automatic RAM initialization in all modes
                        - four programmable refresh modes
                        - transparent memory scrubbing in ECC mode
                        - fast cycle support for 8 MHz 80286 with 8207-16
                        - slow cycle support for 8 MHz, 10 MHz 8086/88, 
                          80186/188 with 82078, 8207-10
                        - provides signals to directly control the 8206 error 
                          detection and correction unit
                        - supports synchronous or asynchronous operation on 
                          either port
                        - 68 lead JEDEC type A leadless chip carrier (LCC) 
                          and pin grid array (PGA), both in ceramic
8208            82C08. CHMOS dynamic RAM controller.
                        - 0 wait state with Intel m-processors
                        - supports 64K and 256K DRAMs (256K x 1 and 256K x 4 
                          organizations)
                        - power down mode with programmable memory refresh 
                          using battery backup
                        - directly addresses and drives up to 1 Mbytes 
                          without external drivers
                        - microprocessor data transfer and advance 
                          acknowledge signals
                        - five programmable refresh modes
                        - automatic RAM warm-up
                        - pin-compatible with 8208
                        - 48 lead plastic DIP; 69 lead PLCC
                        - compatible with normal modes of static column and 
                          ripplemode DRAMs
8212            8-bit Input/Output port.
                        - fully parallel 8-bit data register and buffer
                        - service request flip-flop for interrupt generation
                        - low input load current - .25 mA max.
                        - three state outputs
                        - outputs sink 15 mA
                        - 3.65V output high voltage for direct interface to 
                          8008, 8080A or 8085A CPU
                        - asynchronous register clear
                        - replaces buffers, latches and multiplexers in 
                          microcomputer systems
                        - reduces system package count
8216            8216, 8226. 4-bit parallel bi-directional bus driver.
                        - data bus buffer driver for 8080 CPU
                        - low input load current - .25 mA max.
                        - 3.65V output high voltage for direct interface to 
                          8080 CPU
                        - 3-state outputs
                        - reduces system package count
8218            8218, 8219. Bipolar microcomputer bus controllers for MCS-80 
                and MCS-85 families.
                        - 8218 for use in MCS-80 systems
                        - 8219 for use in MCS-85 systems
                        - coordinates the sharing of a common bus between 
                          several CPU's
                        - reduces component count in multimaster bus 
                          arbitration logic
                        - single +5V power supply
                        - 28 pin package
8224            Clock generator and driver for 8080A CPU.
                        - single chip clock generator/driver for 8080A CPU
                        - power-up reset for CPU
                        - ready synchronizing flip-flop
                        - advanced status strobe
                        - oscillator output for external system timing
                        - crystal controlled for stable system operation
                        - reduces system package count
8228            8228, 8238. System controller and bus driver for 8080A CPU.
                        - single chip system control for MCS-80 systems
                        - built-in bi-directional bus driver for data bus 
                          isolation
                        - allows the use of multiple byte instructions 
                          (e.g. CALL) for interrupt acknowledge
                        - user selected single level interrupt vector (RST 7)
                        - 28-pin dual in-line package
                        - reduces system package count
                        - 8238 had advanced IOW/MEMW for large system timing 
                          control
8231            8231A. Arithmetic processing unit.
                        - fixed point single and double precision (16/32 bit)
                        - floating point single precision (32 bit)
                        - binary data formats
                        - add, substract, multiply and divide
                        - trignometric and inverse trignometric functions
                        - square roots, logariths, exponentiations
                        - float to fixed and fixed to float conversions
                        - stack oriented operand storage
                        - compatible with all Intel and most other 
                          microprocessor families
                        - direct memory access or programmed I/O data 
                          transfers
                        - end of execution signal
                        - general purpose 8-bit data bus interface
                        - standard 24 pin package
                        - +12V and +5V power supplies
                        - advanced N-channel silicon gate HMOS technology
8232            Floating point processing unit.
                        - compatible with proposed IEEE format and existing 
                          Intel floating point standard
                        - single (32-bit) and double (64-bit) precision 
                          capability
                        - add, substract, multiply and divide 
                        - stack oriented operand storage
                        - general purpose 8-bit data bus interface
                        - standard 24 pin package
                        - +12V and +5V power supplies
                        - compatible with MCS-80, MCS-85 and MCS-86 
                          microprocessor families
                        - error interrupt
                        - direct memory access or programmed I/O data 
                          transfers
                        - end of execution signal
                        - advanced N-channel silicon gate HMOS technology
82355           An Intel bus master interface controller.
82357           An Intel integrated system peripheral.
8237            8237A, 8237A-4, 8237A-5. High performance programmable DMA 
                controller.
                        - enable/disable control of individual DMA requests
                        - four independent DMA channels
                        - independent autoinitialization of all channels
                        - memory-to-memory transfers
                        - memory block initialization
                        - address increment or decrement
                        - high performance: transfers up to 1.6 Mbytes/sec 
                          with 5 Mhz 8237A-5
                        - directly expandable to any number of channels
                        - end of process input for terminating transfers
                        - software DMA requests
                        - independent polarity control for DREQ and DACK 
                          signals
82380           High performance 32-bit DMA controller with integrated system 
                support peripherals.
82385           High performance 32-bit cache controller.
8250            UM8250A/B. A universal asynchronous receiver-transmitter 
                (UART) by Intel.
8251            8251A. Programmable Communication Interface.
                        - synchronous and asynchronous operation
                        - synchronous 5-8 bit characters; internal or external 
                          character synchronization; automatic sync insertion
                        - asynchronous 5-8 bit characters; clock rate - 1, 
                          16 or 64 times baud rate; break character 
                          generation; 1, 1.5 or 2 stop bits; false start bit 
                          detection; automatic break detect and handling
                        - synchronous baud rate - DC to 64K baud
                        - asynchronous baud rate - DC to 19.2K baud
                        - full -duplex, double-buffered transmitter and 
                          receiver
                        - error detection - parity, overrun and framing
                        - compatible with an extended range of Intel 
                          microprocessors
                        - 28-pin DIP package
                        - all inputs and outputs are TTL compatible
8253            8253, 8253-5. Programmable interval timer.
                        - MCS-85 compatible 8253-5
                        - 3 independent 16-bit counters
                        - DC to 2.6 MHz
                        - programmable counter modes
                        - count binary or BCD
                        - single +5V supply
8254            Programmable interval timer.
                        - compatible with all Intel and most other 
                          microprocessors
                        - status read-back command
                        - six programmable counter modes
                        - three independent 16-bit counters
                        - binary or BCD counting
                        - single +5V supply
8255            8255A, 8255A-5. A Programmable Peripheral Interface (PPI) 
                by Intel.
                        - MCS-85 compatible 8255A-5
                        - 24 programmable I/O pins
                        - completely TTL compatible
                        - fully compatible with Intel microprocessor families
                        - improved timing characteristics
                        - direct bit set/reset capability easing control 
                          application interface
                        - reduces system package count
                        - improved DC driving capability
                        - 40 pin DIP package or 44 lead PLCC
8256            8256AH. Multifunction microprocessor support controller.
                        - programmable serial asynchronous communications 
                          interface for 5-, 6-, 7- or 8-bit characters, 1, 
                          1.5 or 2 stop bits and parity generation
                        - on-board baud rate generator programmable for 13 
                          common baud rates up to 19.2 KBits/second, or an 
                          external baud clock maximum of 1Mbit/second
                        - five 8-bit programmable timer/counters; four can 
                          be cascaded to two 16-bit timer/counters
                        - two 8-bit programmable parallel I/O ports; port 1 
                          can be programmed for port 2 handshake controls 
                          and event counter inputs
                        - eight-level priority interrupt controller 
                          programmable for 8085 or iAPX 86, iAPX 88 systems 
                          and for fully nested interrupt capability
                        - programmable system clock to 1 x, 2 x, 3 x or 
                          5 x 1.204 MHz
8257            8257, 8257-5. Programmable DMA controller.
                        - MCS-85 compatible 8257-5
                        - 4-channel DMA controller
                        - priority DMA request logic
                        - channel inhibit logic
                        - terminal count and modulo 128 outputs
                        - single TTL clock
                        - single +5V supply
                        - auto load mode
8259            8259A, 8259A-2, 8259A-8. A programmable interrupt controller 
                by Intel.
                        - iAPX 86,  iAPX 88 compatible
                        - MCS-80, MCS-85 compatible
                        - eight-level priority controller
                        - expandable to 64 levels
                        - programmable interrupt modes
                        - individual request mask capability
                        - single +5V supply (no clocks)
                        - 28-pin dual-in-line package
8271            8271, 8271-6. Programmable floppy disk controller. 
                        - IBM 3740 Soft sectored format compatible
                        - Programmable record lengths
                        - Multi-sector capability
                        - Maintain dual drives with minimum software overhead 
                          expandable to 4 drives
                        - Automatic read/write head positioning and 
                          verification
                        - Internal CRC generation and checking
                        - Programmable step rate, settle- time, head load 
                          time, head unload index count
                        - Fully MCS-80 and MCS-85 compatible
                        - Single + 5V supply
                        - 40-pin package
82716           Video storage and display device.
8272            8272A. Single/double density floppy disk controller.
                        - IBM compatible in both single and double density 
                          recording formats
                        - Programmable data record lengths : 128, 256, 512 
                          or 1024 bytes/sector
                        - Multi-sector and multi-track transfer capability
                        - Drives up to 4 floppy or mini-floppy disks
                        - Data transfers in DMA or Non-DMA mode
                        - Parallel seek operations on up to four drives
                        - Compatible with all Intel and most other 
                          microprocessors
82720           Graphics display controller.
8273            8273, 8273-4, 8273-8. Programmable HDLC/SDLC protocol 
                controller.
                        - CCITT X.25 compatible
                        - HDLC/SDLC compatible
                        - Full duplex, half duplex or loop SDLC operations
                        - Up to 64K baud synchronous transfers
                        - Automatic FCS (CRC) generation and checking
                        - Up to 9.6K baud with on-board phase locked loop
                        - Programmable NRZI encode/decode
                        - Two user programmable modem control ports
                        - Digital phase locked loop clock recovery
                        - Minimum CPU overhead
                        - Fully compatible with 8048/8080/8085/8088/8086 CPUs
8275            8275H. Programmable CRT controller. 
                        - Programmable screen and character format
                        - 6 independent visual field attributes
                        - 11 Visual character attributes (graphic capability)
                        - Cursor control (4 types)
                        - Light pen detection and registers
                        - MCS-51, MCS-85, iAPX 86 and iAPX 88 compatible
                        - Dual row buffers
                        - Programmable DMA burst mode
8276            8276H. Small system CRT controller.
                        - Programmable screen and character format
                        - 6 independent visual field attributes
                        - Cursor control (4 types)
                        - MCS-51, MCS-85, iAPX 86 and iAPX 88 compatible
                        - Dual row buffers
82786           CHMOS graphics coprocessor.
8279            8279-5. Programmable keyboard/display interface.
                        - Simultaneous keyboard display operations
                        - Scanned keyboard mode
                        - Scanned sensor mode
                        - Srobed input entry mode
                        - 8-character keyboard FIFO
                        - 2-key lockout or N-key rollover with contact 
                          debounce
                        - Dual 8- or 16-numerical display
                        - Single 16-character display
                        - Right or left entry 16-byte display RAM
                        - Mode programmable from CPU
                        - Programmable scan timing
                        - Interrupt output on key entry
8282            Octal latch.
                        - Address latch for iAPX 86, 88, 186, 188, MCS-80, 
                          MCS-48 families
                        - High output drive capability for driving system 
                          data bus
                        - Fully parallel 8-bit data register and buffer
                        - Transparent during active strobe
                        - 3-state outputs
                        - 20-pin package with 0.3'' center
                        - No output low noise when entering or leaving high 
                          impedance state
8283            Octal latch. See 8282.
8284            8284A, 8284A-1. Clock generator and driver for iAPX 86,88 
                processors.
                        - Generates the system clock for the iAPX 86, 88 
                          processors: 5 MHz, 8 MHz with 8284A; 10MHz with 
                          8284A-1
                        - Uses a crystal or a TTL signal for frequency source
                        - Provides local ready and multibus ready 
                          synchronization
                        - 18-pin package
                        - Single + 5V power supply
                        - Generates system reset output from Schmitt Trigger 
                          input
                        - Capable of clock synchronization with other 8284As
8286            Octal bus transceiver.
                        - Data bus buffer driver for iAPX 86, 88, 186, 188, 
                          MCS-80, MCS-85 and MCS-48 families
                        - High output drive capability for driving system 
                          data bus
                        - Fully parallel 8-bit transceivers
                        - 3-state outputs
                        - 20-pin package with 0.3'' center
                        - No output low noise when entering or leaving high 
                          impedance state
8287            Octal bus transceiver. See 8286.
8288            Bus controller for iAPX 86,88 processors.
                        - Bipolar drive capability
                        - Provides advanced commands
                        - Provides wide flexibility in system configurations
                        - 3-state command output drivers
                        - Configurable for use with an I/O bus
                        - Facilities interface to one or two multi-master 
                          busses
8289            Bus arbiter.
                        - Provides multi-master system bus protocol
                        - Synchronizes iAPX 86,88 processors with 
                          multi-master bus
                        - Provides simple interface with 8288 bus controller
                        - Compatible with Intel bus standard MULTIBUS
                        - Provides system bus arbitration for 8089 IOP remote
                          mode
8291            8291A GPIB talker/ Listener.
                        - Designed to interface microprocessors to an IEEE 
                          standard 488 digital interface bus
                        - Programmable data transfer rate
                        - Complete source and acceptor handshake
                        - Complete talker and listener functions with 
                          extended addressing
                        - Service request, parallel poll, device clear, 
                          device trigger, remote/local functions
                        - Selectable interrupts
                        - On-chip primary and secondary address recognition
                        - Automatic handling of addressing and handshake 
                          protocol
                        - Provision for software implementation of additional
                          features
                        - 1 - 8 Mhz clock range
                        - 16 registers (8 read, 8 write), 2 for data transfer, 
                          the rest for interface function control, status, 
                          etc.,...
                        - Directly interfaces to external non-inverting 
                          transceivers for connection to the GPIB
                        - Provides three addressing modes, allowing the chip 
                          to be addressed either as a major or a minor 
                          talker/listener with primary or secondary addressing
                        - DMA handshake provision allows for bus transfers 
                          without CPU intervention
                        - Trigger output pin
                        - On-chip EOS message recognition facilities handling
                          of multi-byte transfers
8292            GPIB controller.
                        - Complete IEEE standard 488 controller function
                        - Interface clear (IFC) sending capability allows 
                          seizure of bus control and/or initialization of the 
                          bus
                        - Responds to service request (SQR)
                        - Sends remote enable (REN), allowing instruments to 
                          switch to remote control
                        - Complete implementation of transfer control protocol
                        - Synchronous control seizure prevents the 
                          destruction of any data transmission in progress
                        - Connects with the 8291 to form a complete IEEE 
                          standard 488 interface talker/listener/controller
8293            GPIB transceiver.
                        - Nine open-collector or three-state line drivers
                        - 48mA sink current capability on each line driver
                        - Nine Schmitt-type line receivers
                        - High capacitance load driver capability
                        - Single 5V power supply
                        - 28-pin package
                        - Low power HMOS design
                        - On-chip decoder for mode configuration
                        - Power up/Power down protection to prevent 
                          disrupting the IEEE bus
                        - Connects with the 8291A and 8292 to form an IEEE 
                          standard 488 interface talker/listener/controller 
                          with no additional components
                        - Only two 8293's required per GPIB interface
                        - On-chip IEEE-488 bus terminations
8294            Data encryption unit.
                        - Certified by national bureau of standards
                        - 400 byte/sec data conversion rate
                        - 64-bit data encryption using 56-bit key
                        - DMA interface
                        - 3 interrupt outputs to aid in loading and unloading 
                          data
                        - 7-bit user output port
                        - Fully compatible with iAPX-86, 88, MCS-85, MCS-80, 
                          MCS-51 and MCS-48 processors
                        - Implements federal information processing data
                          encryption standard
                        - Encrypt and decrypt modes available
8295            Dot matrix printer controller.
                        - Interfaces dot matrix printers to MCS-48, MCS-80/85, 
                          MCS-86 systems
                        - 40 character buffer on chip
                        - Serial or parallel communication with host
                        - DMA transfer capability
                        - Programmable character density (10 or 12 
                          characters/inch)
                        - Programmable print intensity
                        - Single or double width printing
                        - Programmable multiple line feeds
                        - 3 tabulations
                        - 2 general purpose outputs
8355            8355-2. 16,384-bit ROM with I/O
                        - 2048 words x 8 bits
                        - Single + 5V power supply
                        - Directly compatible with 8085A and iAPX 88 
                          microprocessors
                        - 2 general purpose 8-bit I/O ports
                        - Each I/O port line individually programmable as 
                          input or output
                        - Multiplexed address and data bus
                        - Internal address latch
                        - 40-pin DIP
8394            See 8094
8395            See 8094.
8396            See 8094.
8397            See 8094.
8755            8755A, 8755A-2. 16,384-bit EPROM with I/O. 
                        - 2048 words x 8 bits
                        - Single + 5V power supply
                        - Directly compatible with 8085A and 8088 
                          microprocessors
                        - U.V. erasable and electrically reprogrammable
                        - Internal address latch
                        - 2 general purpose 8-bit I/O ports
                        - Each I/O port line individually programmable as 
                          input or output
                        - Multiplexed address and data bus
                        - 40-pin DIP
88000           A 32-bit RISC microprocessor (circa 1989) by Motorola.

