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Subj : Re: Using hierarchical memory as an acquire memory barrier for
To   : comp.programming.threads,comp.arch
From : Alexander Terekhov
Date : Mon Sep 12 2005 07:07 pm


Joe Seigh wrote:
[...]
> Which is why I used the word "most".  Dependent load ordering isn't part
> of any of the official memory models as far as I know so the behavior
> was allowable. 

Your knowledge is inaccurate.
 
>                It's also allowable on x86 

In Alpha speak, x86 loads from WB memory (I mean processor consistency) 
all have trailing "MB". 

regards,
alexander.

.

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