2dc
Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Sean Kelly
Date : Thu Sep 01 2005 01:18 pm

Peter Dimov wrote:
>
> The unusual load with msync_rel would need a LOCK or an MFENCE, true,
> as would a store with msync_acq.
>
> But the common load.acq and store.rel operations map to MOV, no LOCK or
> MFENCE. A load.acq is allowed to migrate above a store.rel.

Gotcha.  So the only load/store operation that requires a membar is
store.acq, which is likely implemented in terms of XCHG (since MOV
doesn't support the LOCK prefix).  And attempt_update (ie. CMPXCHG) is
always locked as it must be made atomic regardless of the msync method
specified.


Sean

.

0