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Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Joe Seigh
Date : Thu Sep 01 2005 09:27 am

Alexander Terekhov wrote:
> Joe Seigh wrote:
> [...]
> 
>>I'm finding it impossible to argue with a moving target.  If I subtract
>>everything you say out, it pretty much sounds like ia32 loads are not
>>always guaranteed to be "in-order".  
> 
> 
> They are always "in-order" with respect to other loads and subsequent
> stores. What you can't grok is that ia32 *stores* (being PC stores; 
> i.e. RCpc release stores) are not constrained to ensure "remote write 
> atomicity" (in IA64 formal memory model speak).
> 

It's probably just me but I can't figure out *anything* you say.  And
trying to get clarification from you doesn't work due to the moving
target problem.  It's like trying to do error correction by adding
more noise.  Sorry, end of discussion.


-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

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