                .DO     ListDefs
                .LSTON
                .page
                .FIN

;*************************************************************************
;*   scc equates - scc chip registers
;************************************************************************

;=======================================================================
;write control registers:
;======================================================================
sw0cmd          .equ $21        ;command register
  rtcrc         .equ $81        ;reset tx crc gen; issue after tx enabled
  rturl         .equ $C0        ;reset tx underrun/eom latch. Req'd for 
;crc transmission at eom, issue after 1st byte is written to chip.
  erres         .equ $30        ;resets receive error bits: crc,eof,ovr in sr1.
  sndab         .equ $10        ;send abort sequence. Don't plan to use.
  rxint         .equ $10        ;resets ext status interrpts. Don't plan to use.
  
sw1int          .equ $23        ;xmt, rcv interrupt modes.  Not used.
  intinit       .equ $E0        ;Disable xmt, rcv interrupts.
  
sw2iv           .equ $25        ;scc interrupt vector. Not used.
sw3rcv          .equ $27        ;receiver modes.
  rcvinit       .equ $DC
  rcven         .equ $DD    

sw4mode         .equ $29        ;set sdlc mode
  sdlc          .equ $20
  
sw5xmt          .equ $2B        ;transmitter modes
  xmtinit       .equ $E1        ;sets DTR, but txen and RTS reset.
  xmtdiag       .equ $69        ;sets txen, resets RTS and DTR.
  xmt_setup     .equ $E2        ;DTR on, RTS off, xmtr disabled
  xmten         .equ $09        ;sets txen and tx crc enable
  xmtr_off      .equ $E3        ;resets txen, but DTR, RTS set
  DTR           .equ $80        ;DTR bit in sw5xmt
  RTS           .equ $02        ;RTS bit in sw5xmt
  
sw6adr          .equ $2D        ;contains sdlc node address for adrs compare.
  myadr         .equ $01        ;block server default address.
  pick1         .equ $80        ;special adrs for dynamic assignment.
  
sw7flg          .equ $2F        ;sdlc flag register
  flag          .equ $7E
  
sw8buf          .equ $31        ;transmit buffer
sw9rst          .equ $33        ;reset control
  hrst          .equ $C0        ;hardware reset, register initialized to this
;value after power up.  This command does same thing.
  chrst         .equ $80        ;channel A reset.
  
sw10tcntrl      .equ $35        ;transmit control
  tcntrl_init   .equ $E0        ;flag idle, crc preset to all 1's.
  
sw11clk         .equ $37        ;xmt, rcv clock sources.
  clkvalt       .equ $75        ;TRxC out = xmt clock (BR generator).
  clkvalr       .equ $77        ;TRxC out = DPLL
  clkvalbg      .equ $76        ;TRxC out = BR gen. (should be coverd by #1)
  
sw12brl         .equ $39        ;low byte of BR generator
  brgenlo       .equ $06
sw13brh         .equ $3B        ;hi byte of BR generator.
  brgenhi       .equ $00
  
sw14cgen        .equ $3D        ;DPLL setup, br gen source and enable.
  displl        .equ $60        ;disable pll
  setfm         .equ $C0
  pllclk        .equ $A0        ;dpll clk = RTxC.
  enpll         .equ $20
  rstmck        .equ $41        ;reset missing clock
  enbrg         .equ $01        ;enable br generator.
  loopbk        .equ $11        ;local loopback on chip. Not used, dpll disabled

sw15xint        .equ $3F        ;tx, rcv interrupt enable register.  Not used.
  xintdis       .equ $00

;========================================================================
;read control registers:
;=======================================================================
sr0sts          .equ $21        ;tx, rcv status.
  rchar         .equ $01        ;rcv char avail. mask.
  tbuf_emp      .equ $04        ;tx buffer empty mask.
  tur_eom       .equ $40        ;tx underrun/eom latch. Set at start of crc,
;must be reset by cmd in sw0cmd.
  sync_hunt     .equ $10        ;sync/hunt bit - used for idle line detect
  
sr1sts          .equ $23        ;rcvr status - crc, overrun, eof.
  eof           .equ $80        ;end of frame.  Indicates crc error bit valid.
  crc           .equ $40        ;crc error bit.
  ror           .equ $20        ;receiver overrun bit.

sr2iv           .equ $25        ;int vector, not used.
sr3intp         .equ $27        ;int pending bits, not used.
sr8buf          .equ $31        ;read buffer.
sr10mclk        .equ $35        ;missing clock latches.
  onecm         .equ $80        ;one clock missing bit.
  twocm         .equ $40
  
sr12brl         .equ $39        ;returns value in sw12brl, br gen time const.
sr13brh         .equ $3B        ;returns value in sw13brh.
sr15xint        .equ $3F        ;returns value from sw15xint, not used.

;------------------------------------------------------------------------------
;
;    Z8 registers...    AppleBus style
;
;------------------------------------------------------------------------------

wrk_absys       .equ $30        ;applebus working system set
wrk_abtr        .equ $10        ;applebus transmit receive set for tpack/rpack
wrk_global      .equ $40        ;applebus global variable storage

;-----------------------------------------------------------------------------
;
;       Rpack and tpack use working set $10
;
;-----------------------------------------------------------------------------

rt_source       .equ $11        ;expected source node
scc_chiphi      .equ $12        ;ptr to scc chip register set.
scc_chiplo      .equ $13
scc_chip        .equ scc_chiphi
scc_sts0hi      .equ $12        ;wrk reg ptr to scc read reg 0 - status
scc_sts0lo      .equ $13
scc_sts1hi      .equ $16        ;wrk reg ptr to scc read reg 1 - more status
scc_sts1lo      .equ $17
scc_wbufhi      .equ $18        ;wrk reg ptr to scc on-chip write buffer
scc_wbuflo      .equ $19
scc_rbufhi      .equ $18        ;wrk reg ptr to scc on-chip read buffer
scc_rbuflo      .equ $19
scc_sts0        .equ scc_sts0hi
scc_sts1        .equ scc_sts1hi
scc_wbuf        .equ scc_wbufhi
scc_rbuf        .equ scc_rbufhi
rcvto_hi        .equ $1C
rcvto_lo        .equ $1D        ;location for timeout for 1st char rcv in rpack
exp_ctrl        .equ $1A        ;location for 1st expected control byte
boffhi          .equ $1C        ;backoff value for tpack
bofflo          .equ $1D
boff            .equ boffhi
xmtbufhi        .equ $1E        ;ptr to transmit buffer in RAM.
xmtbuflo        .equ $1F
xmtbuf          .equ xmtbufhi
rcvbufhi        .equ $1E        ;ptr to receive buffer in RAM
rcvbuflo        .equ $1F
rcvbuf          .equ rcvbufhi
 
rt_pntr_hi      .equ    rcvbufhi        ;LAP level versions
rt_pntr_lo      .equ    rcvbuflo
rt_pntr         .equ    rcvbuf

bytecnthi       .equ $1A        ;byte count passed between rpack/tpack (transmit
bytecntlo       .equ $1B        ;packet/receive packet) and calling routines
bytecnt         .equ bytecnthi

;------------------------------------------------------------------------------
;
;       Global variable area is in working set $40
;
;------------------------------------------------------------------------------

seedhi          .equ    $40             ;Random number seed
seedlo          .equ    $41
bus_stat1       .equ $42        ;applebus status byte - state variables
  d_busy        .equ $80        ;transaction on bus in progress
  l_busy        .equ $40        ;link-level transaction in progress
  msg_rcvd      .equ $20        ;set by receive packet routine if good pkt rcvd
  broadcast     .equ $10        ;broadcast packet received
  msg_sent      .equ $08        ;set by transmit packet routine if msg sent
  sccinten      .equ $04        ;Timer 1 interrupt if due to scc timeout
  sccdiag       .equ $02        ;scc diagnostic mode
  lap_only      .equ $01        ;flag to tell xmt packt routne to send hdr only

bus_stat2       .equ $43

bus_stat3       .equ $44        ;applebus status byte - fatal type errors
  ab_abort      .equ $80        ;fatal error of some kind
  no_busidle    .equ $40        ;bus never went idle in tpack routine
  no_busaccess  .equ $20        ;could never xmt on bus after n retries
  scc_timout    .equ $10        ;rpack routine never completed after 1st char 
  rorerr        .equ $08        ;receiver overrun in rpack routine
  boff_fail     .equ $04        ;# collisions on bus > retry count
   fatal        .equ ab_abort+scc_timout+rorerr

bus_stat4       .equ $45        ;applebus status byte - "soft" errors
  bus_busy      .equ $80        ;bus went busy during backoff in tpack
  rcv_timout    .equ $40        ;no char detected before timeout in rpack
  typ_mismatch  .equ $20        ;header bytes were not what was expected
  collision     .equ $10        ;one or more collisions detected (no CTS or ACK)
  data_mismatch .equ $08        ;data rcvd not what was sent in scc diagnostic
  scc_crcerr    .equ $04        ;crc error detected in received packet

io_buff_hi      .equ    $46     ;Pointer to IO buffer
io_buff_lo      .equ    $47
io_buff         .equ    io_buff_hi

io_cnt_hi       .equ    $48     ;Bytes received/xmitted
io_cnt_lo       .equ    $49
io_cnt          .equ    io_cnt_hi

my_node         .equ    $4A     ;Our node number
curr_node       .equ    $4B     ;The current node sender
our_sckt        .equ    $4C     ;The current socket listener
their_sckt      .equ    $4D     ;The current socket sender
boff_hist       .equ    $4E     ;History of the last 8 xmit tries
boff_mask       .equ    $4F     ;The current back off mask

;------------------------------------------------------------------------------
;
;       Abus uses working set $30
;
;------------------------------------------------------------------------------

pntr_hi         .equ    $4              ;DDP level pointer $30,$31
pntr_lo         .equ    $5     
pntr            .equ    pntr_hi
rand_cnt        .equ    pntr_hi         ;Random number counter
aux_pntr_hi     .equ    $6             ;DDP level auxillery pointer
aux_pntr_lo     .equ    $7
aux_pntr        .equ    aux_pntr_hi
sel_cnt         .equ    aux_pntr_hi     ;Dynamic node selection counter
sckt_cnt        .equ    $8              ;Number of open sockets
tab_size        .equ    $9              ;Counter for scker search
rand_temp       .equ    tab_size        ;Random gen temp storage
boff_temp       .equ    tab_size        ;Back off calculator storage
ddp_temp        .equ    $A              ;DDP level temp storage
rand2_temp      .equ    ddp_temp    
boff_cnt        .equ    rand2_temp
request         .equ    $7              ;Command byte received

retry_cnt       .equ    $C              ;Counter for re-xmitting
idbufhi         .equ $3A        ;ptr to buffer for scc id bytes in RAM - 
idbuflo         .equ $3B        ;for diagnostic use only
idbuf           .equ idbufhi
lap_ptr         .equ $3D        ;ptr to link access protocol header bytes
their_node      .equ $3D        ;dest. node when xmt; src node on receive
our_node        .equ $3E        ;Widget's node number
lap_ctrl        .equ $3F        ;lap protocol type or lap function (RTS, etc.)

;------------------------------------------------------------------------------
;
;       Abus constants
;
;-----------------------------------------------------------------------------

RTScode         .equ    $84     ;LAP codes
CTScode         .equ    $85
ENQcode         .equ    $81
ACKcode         .equ    $82
NAKcode         .equ    $83
DATAcode        .equ    $10
HDPcode         .equ    $10

multi           .equ    $26
multi_bit       .equ    $20
diag_bit        .equ    $10
write_cmd       .equ    $01
read_len        .equ    512+4+7
write_len       .equ    7
status_len      .equ    7
xmt_retries     .equ    $10     ;Sixteen retries
two_sec         .equ    $2710   ;Timer count for 2 second time out
sckt_tab        .equ    $1757   ;Start of socket table
dummy           .equ    sckt_tab+$20  ;Start of LAP receive buffer
reg_store       .equ    dummy   ;Register storage
open_max        .equ    $0F     ;Max number of open sockets
find_cnt        .equ    $10     ;Maximum times to retry node check
reg_cnt         .equ    $20     ;Save two sets of regs
packet_size     .equ    512+4   ;Size of packet is block size plus status

;******************************************************************************
; scc equates - constants
;******************************************************************************

sccbank         .equ $1C01      ;address to enable scc chip access. Also enabled
;  by any $1Cxx address where xx is odd.
sccbankoff      .equ $1C00      ;disables scc bank select.
scc_P01m        .equ P0_03Adr + P0_47_Out + Stack_In + P1_Adr + Mem_Ext
wig_adrdata     .equ P0_03Adr + P0_47_Out + Stack_In + P1_Adr
cmdlen          .equ $07        ;widget command length.
abus_idlen      .equ $03        ;length of id byte field in Applebus packets.
twobyt          .equ 32         ;delay for two bytes of FM0 "1's" at end of pkt
lead_flgs       .equ $01        ;delay for leading flags to xmt at start of pkt
busidl_to       .equ 5000       ;2 sec. timeout in tpack, wait for bus idle
w_200           .equ 93         ;200 us timeout value for rpack and tpack w/T1
w_400           .equ 186        ;400 us timeout   "              "
tlcnt           .equ $04        ;(# of times xmt/rcv a byte)  in self test.
tbcnt           .equ $01        ;# of bytes to xmt during self test
testbyt1        .equ $55        ;bytes to xmt during self test.
testbyt2        .equ $AA        ;also the address recognition byte since it is
testbyt3        .equ $00        ;the first (and only if tbcnt=1) byte xmitted.
testbyt4        .equ $FF  

;***************************************************************************
;*   scc equates - external memory
;***************************************************************************

                .org StatusArray - abus_idlen

sccxmtbuf:      .block 0,532 + abus_idlen             ;transmit buffer

                .org WBuffer1 - cmdlen - abus_idlen

sccrcvbuf:      .block 0,532 + cmdlen + abus_idlen + 2 ;receive buffer(incl crc)

                .org Cur_THS + 3                ;last Widget storage area in Ram

sccidbuf:       .block 0,abus_idlen                   ;id buffer

                .LSTOFF
