(IMG) n article <processoroverclocked-1705002203220001@nn-157-22-180-2.napanet.net>,
(???) on Bettencourt <processoroverclocked@33mhz.com> wrote:
(???)
(???) > Also, could someone enlighten me to what card would be in slot 4 with a
(???) > Z80A CPU - the IIe works fine without the card in, and the LED doesnt
(???) > come on on the card.
(???)
(???) That's a CP/M card. The LED comes on when you start using it (i.e. boot
(???) up with a CP/M disk).
(???)
(IMG) f the 6502 *writes* to the address where normally the boot ROM code
(SND) tarts ($C400 for a CP/M card in slot 4), then the 6502 is switched
(???) ff and the Z80 starts executing from Z80 address 0000h. Before
(DOC) oing that though, one had better load some Z80 code at that address,
(SND) o the Z80 does something sensible.
(???)
(TN3) o switch back to 6502 mode, the Z80 must write to the same address
(???) E400h) -- then the Z80 stops and the 6502 resumes executing.
(???)
(???) ince the 6502 is a dynamic CPU, it cannot remain idle for more than
(???) bout 50 microseconds, or else it'll "forget" the contents of its
nternal regusters, and then you'd be in real trouble. To avoid this,
(???) he Z80 ticks at 4 Mhz for 2 cycles, then remains idle for two cycles
(DOC) uring which the 6502 is refreshed (the 6502 is allowed to fetch one
(???) yte, but it doesn't use that byte for anything).
(???)
(TN3) he Z80 card contains address translation logic, to avoid having
(???) he Z80 address 0000h coincide with the 6502 address $0000. The
(???) ranslation works as follows:
(???)
(???) Z80 address 6502 address
(???)
(???) SP 0000h - 0FFFh $1000 - $1FFF
(TN3) PA start 1000h - 1FFFh $2000 - $2FFF
(???) 2000h - 2FFFh $3000 - $3FFF
(???) 3000h - 3FFFh $4000 - $4FFF
(???) 4000h - 4FFFh $5000 - $5FFF
(???) 5000h - 5FFFh $6000 - $6FFF
(???) 6000h - 6FFFh $7000 - $7FFF
(???) 7000h - 7FFFh $8000 - $8FFF
(???) 8000h - 8FFFh $9000 - $9FFF
(???) 9000h - 9FFFh $A000 - $AFFF
(???) A000h - AFFFh $B000 - $BFFF End of motherboard RAM
(???) B000h - BFFFh $D000 - $DFFF Start of Language Card RAM
(TN3) PA end C000h - CFFFh $E000 - $EFFF
(???) DOS/BIOS D000h - DFFFh $F000 - $FFFF End of Language Card RAM
(IMG) /O area E000h - EFFFh $C000 - $CFFF I/O area
(???) F000h - F0FFh $0000 - $00FF 6502 page zero
(???) F100h - F1FFh $0100 - $01FF 6502 stack
(IMG) /O drivers F200h - F3FFh $0200 - $03FF
(TN3) ext screen F400h - F7FFh $0400 - $07FF
(???) F800h - FFFFh $0800 - $0FFF CP/M RWTS (6502 code)
(???)
(TN3) his assumes a Language Card: if a Language Card is present, CP/M
(???) nables it and disables the onboard ROM's. If the Language Card is
(???) bsent, the TPA is 12K smaller. Note how the Z80 ==> 6502 address
(???) ranslation "hides" the "hole" in the memory map due to the Apple
(IMG) I I/O area at $C000-$CFFF, and makes motherboard and Language Card
(???) AM appear as one contiguous RAM area.
(???)
(???) -
(???) ---------------------------------------------------------------
(???) aul Schlyter, Swedish Amateur Astronomer's Society (SAAF)
(???) rev Turegatan 40, S-114 38 Stockholm, SWEDEN
(???) -mail: pausch at saaf dot se or paul.schlyter at ausys dot se
(???) WW: http://hotel04.ausys.se/pausch http://welcome.to/pausch