Posts by tnt@chaos.social
(DIR) Post #B4BXynVDTQWJjcgF2O by tnt@chaos.social
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How does one debug a PCIe gen 3 link SI issue (probably) without any test gear 😅 (Well without any gear that has nearly enough BW at least, I'm about 10x too slow ...)
(DIR) Post #B4BXynuNxqeYzgSLGi by tnt@chaos.social
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@yannsionneau On one side yes, ( Xilinx FPGA ), the other side, I have more limited visibility.Basically AFAICT it's just not happy with link quality / error rate after the EQ phases and retries and eventually gives up.The path is very weird since I'm trying to get things to work over an optical link. ( Works fine at Gen2 FWIW ) and there are plenty of opportunity for signal to get screwed up.
(DIR) Post #B4BXyo65GM0jZxvgVE by tnt@chaos.social
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@yannsionneau I have several places where I can configure EQ/DeEmphasis and stuff like that but with no real visibility of what the signal look like at the various stages, it's kind of hard to know what to do.One of the side is a PEX8747 PCIe switch and I'm trying to get their java software to run to see if it says anything 😅
(DIR) Post #B4BXyoN6F5ccQjtH1c by tnt@chaos.social
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@yannsionneau Yes, that's why I'm trying to get that software running, it can collect statistics about the eye opening. It's not exactly the same as an eye diagram but can give a clue.
(DIR) Post #B4BXyoYRYuhCzvCKhs by tnt@chaos.social
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@yannsionneau Well ... not very useful. And this is _NOT_ the link I'm debugging, this is the eye for the upstream port which works fine .... so doesn't seem to be working :/
(DIR) Post #B4BYQkAZSWixVRLixU by tnt@chaos.social
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@azonenberg @ldcd @yannsionneau Yes. Although, I actually disable that 😅 Given the goal is PCIe over optics, the feedback loop of that training doesn't work, it's not meant for it.Instead of optics, I also tried a DAC cable and leave the auto-EQ on, but doesn't work either.
(DIR) Post #B4C5ZREqVie9t06QQS by tnt@chaos.social
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🎉 Got the link working.Still quite many bad DLLP / TLP looking at the couters, but good enough I can actually run a DMA test and can do 4.5 ~ 5 Gbps in both direction at the same time over a 2m fiber link.Definitely more work and tweaking needed but it's good enough to convince me it's doable and invest more time/money in making a better setup. And also trying QSFP transceiver. ( My goal is 4x Gen3 over a 40G-LR4 using a single fiber pair ).
(DIR) Post #B4C5pjRAcEd4xhdWrI by tnt@chaos.social
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@azonenberg Tweaking various parameters. I had some redriver in the path (mostly to trick the receiver detection since SFP don't provide a proper load) and they were set for -2dB de-emphasis, I changed that to 0 dB. And then changed the de-emphasis of the PCIe transmitter from -6 dB to -3.5 dB.
(DIR) Post #B4JMGB4HSxfXYlHXIu by tnt@chaos.social
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@azonenberg But if you're off-axis, won't depth of field be an issue ?I don't have a USB one, I'm using a HDMI one as my "daily driver" (lower latency) and although I'm happy with it and it has a good working distance (especially with 0.35x barlow lens added), it's also fairly shallow DoF.
(DIR) Post #B4NMznJ6uxBhotoGvI by tnt@chaos.social
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@azonenberg The fact challenge 13 is pin T14 and challenge 14 is pin R13 bothers me a bit 😅
(DIR) Post #B4PVosD7dO7zkInPfM by tnt@chaos.social
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@azonenberg Remind me what mill are you using ?I might actually need to connect to two BGA balls that are not broken out on some Aliexpress board and wondering how feasible that'll be for me 😅
(DIR) Post #B4yvN9J3sQty03c1AG by tnt@chaos.social
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@azonenberg I put "outer" only but technically I once cleared an internal short (plane to via) but it was just using a small drill bit right in the via and turning it just between my fingers to destroy the via and then use a bodge wire through the hole to reconnect top trace to bottom trace.I recently tried on a test board to attach a wire to a BGA ball through the board. I drilled by hand (holding drill bit between fingers) and hit the ball but couldn't solder a wire through the hole.
(DIR) Post #B50gFO0EF77uGaYzku by tnt@chaos.social
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@azonenberg I know a couple of years back I had a similar issue ( went to a trip, came back and got weird noise on my scope ). Turned out to be a switching PSU brick that had failed. Completely unrelated to the test setup, just happened to be on the same circuit as my bench and coupling noise somehow.And the PSU was still working, like the device it powered was still up and working. I had to go through my whole appartement unplugging thing one by one to find where it was coming from.
(DIR) Post #B57Cb9Lhlg1Mfhn280 by tnt@chaos.social
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I need help from the #fediverse to figure out how to configure an OV5647 sensor to output on a single MIPI lane.The leaked datasheet I have is ... basically useless. The description of the registers doesn't match reality. There are several bits in there related to mipi lanes, none of them act as one expect and the default value of the register doesn't even make sense if you relate it to the datasheet.So if anyone has a working config, or a contact at omnivision they could ask ...
(DIR) Post #B5mFVwFfInn3wjWpQO by tnt@chaos.social
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@azonenberg Did you just change the optics ( like the QSFP modules ) and the NIC stayed the same (supported 100G all along) ?
(DIR) Post #B6qbsYrhv0aArXcXNg by tnt@chaos.social
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@azonenberg @kenshirriff That was my exact reaction ! First time I ever hear of such thing.
(DIR) Post #B6teheiugEyTBNsWWW by tnt@chaos.social
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If I want to measure small currents, say in the few microamps to 1 mA range, what 2nd hand instrument should I be looking for ?There are pico ampmeter but they are _expensive_ and sort of over kill, I'm not looking for pA. 1 nA resolution and +- 10 count would be fine ...
(DIR) Post #BA5yaMIeisY7ytdWbI by tnt@chaos.social
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@eff 🖕