Newsgroups: comp.arch
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: Instruction (dis)continuation
Message-ID: <1989Sep7.164230.21570@utzoo.uucp>
Organization: U of Toronto Zoology
References: <AGLEW.89Aug21205533@chant.urbana.mcd.mot.com> <1989Aug24.215104.156@mentor.com> <231@ssp1.idca.tds.philips.nl> <2345@oakhill.UUCP> <204@bbxeng.UUCP> <5990@pt.cs.cmu.edu> <205@bbxeng.UUCP> <44908@bbn.COM> <2812@masscomp.UUCP> <4008@bd.sei.cmu.edu>
Date: Thu, 7 Sep 89 16:42:30 GMT

In article <4008@bd.sei.cmu.edu> firth@sei.cmu.edu (Robert Firth) writes:
>>... I seem to recall they solved it by having a diagnostic
>>register in which the CPU wrote which registers had been incremented or
>>decremented and by how much.
>
>>Some PDP-11s had this register, some did not...
>
>The handbooks tell me that this register was implemented on all but one
>of the memory-managed PDP-11s...

Unfortunately, not so:  your handbooks probably are not complete.  The
register appeared on the 45, the first memory-managed 11.  It was left
out on the 40, the second.  The 40's MMU was a cut-down version of the
rather kitchen-sink 45 design, since the 40 was a lower-cost machine,
but unfortunately they left out a couple of important things because no
DEC software of the time used them.  (The changed-registers register was
one, split-space was the other.)  The larger memory-managed 11s followed
the 45; the smaller ones followed the 40.  The 40, 34, 60, 23, and 24,
at least, had the brain-damaged MMU.  The 50, 55, and 70 had the 45 MMU,
but that was no big trick since they were all 45s with changes in memory
subsystem details.  The 44 had a *slightly* simplified 45 MMU that got
rid of some of the silliness but left everything important in.  I think
the more recent 11s have mostly followed the 44, but I haven't been
keeping track.
-- 
V7 /bin/mail source: 554 lines.|     Henry Spencer at U of Toronto Zoology
1989 X.400 specs: 2200+ pages. | uunet!attcan!utzoo!henry henry@zoo.toronto.edu
