Newsgroups: comp.arch
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: DMA on RISC-based systems
Message-ID: <1989May31.163057.543@utzoo.uucp>
Organization: U of Toronto Zoology
References: <46500067@uxe.cso.uiuc.edu> <181@dg.dg.com>
Date: Wed, 31 May 89 16:30:57 GMT

In article <181@dg.dg.com> rec@dg.UUCP (Robert Cousins) writes:
>There are some basic requirements, IMHO, which must be met to be considered
>state-of-the art:  I/O which does not involve the CPU for moving every
>byte, graphics which does not require total CPU dedication for normal
>operations such as line drawing or bit blitting, dedicated LAN controllers
>to handle the low levels of the LAN protocol...
>
>I make this point to begin discussion.  What are some of the minimum
>standards which should be applied to these classes of machines and which
>machines fail to meet them?

The three obvious ones are:

1. A serious assessment of what performance in each of these areas is
	necessary to meet the machine's objectives, and what fraction of
	the CPU would be necessary to do so with "dumb" hardware.  It is
	not likely to be cost-effective to add hardware to save 1% of
	the CPU.  10% might be a different story.  50% definitely is.

2. A serious assessment of the overheads of adding smart hardware, like
	the extra memory bandwidth it eats and the software hassles that
	all too often are necessary.

3. A serious assessment of whether the added performance can be had in a
	more versatile and cost-effective way by just souping up the CPU.

Simply saying "we've got to have smart i/o, and smart graphics, and smart
networks" without justifying this with numbers is marketingspeak, not
a sound technical argument.  As RISC processors have shown us, taking things
*out* of the hardware can result in better systems.
-- 
You *can* understand sendmail, |     Henry Spencer at U of Toronto Zoology
but it's not worth it. -Collyer| uunet!attcan!utzoo!henry henry@zoo.toronto.edu
