Newsgroups: comp.arch
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: RISC/CISC and the wheel of life.
Message-ID: <1988Oct24.183106.18029@utzoo.uucp>
Organization: U of Toronto Zoology
References: <26435@ucbvax.berkeley.edu> <5498@juniper.uucp> <eA37c#1eeGqm=eric@snark.UUCP>
Date: Mon, 24 Oct 88 18:31:06 GMT

In article <1945@ficc.uu.net>, peter@ficc.uu.net (Peter da Silva) writes:
> I have noticed one very interesting thing about RISCs lately... they are
> getting quite sophisticated instruction sets. 3-address operations and
> addressing modes aren't what I used to associate with RIS, but if you look
> at them they turn out to be refinements of older RISCs.

Since "RISC" has become a marketing buzzword, many things are called "RISC"
that are not.  Also, many people are prone to say "well, RISC is a great
thing, but if our hardware doesn't do XYZ directly, it can't possibly be
fast", without actually studying the matter in detail to find out whether
this assertion is really true.  So something that starts out as a RISC gets
steadily more complicated due to the union-of-wishlists effect.  Only a
few outfits -- MIPS and HP come to mind -- really do their homework
before deciding whether to add a feature.
-- 
The dream *IS* alive...         |    Henry Spencer at U of Toronto Zoology
but not at NASA.                |uunet!attcan!utzoo!henry henry@zoo.toronto.edu
