[HN Gopher] PicoZ80 - Drop-In Z80 Replacement
       ___________________________________________________________________
        
       PicoZ80 - Drop-In Z80 Replacement
        
       Author : rickcarlino
       Score  : 94 points
       Date   : 2026-04-09 18:53 UTC (4 hours ago)
        
 (HTM) web link (eaw.app)
 (TXT) w3m dump (eaw.app)
        
       | unixhero wrote:
       | Zilog?
        
         | monocasa wrote:
         | Yes.
        
       | Lerc wrote:
       | I had been pondering about doing more or less the same thing for
       | 6502 (6510).
       | 
       | It was always the dilemma of whether to pull the CPU out of a C64
       | and replace it like this, do it as a bus mastering cartridge, or
       | replace the RAM.
       | 
       | I have been leaning towards the cartridge plan to avoid the
       | requirement of doing machine surgery. If you get the RP2350 to
       | pretend to be the RAM then the video hardware could read directly
       | out of it which makes all sorts of shenanigans possible (every
       | line a BADLINE).
       | 
       | At some point it would look like just plugging A VIC-II and a SID
       | into a board with the RP2350 though, The cartridge approach means
       | you have to do transfers across into the computer's RAM, but you
       | could also write to hardware registers every CPU cycle, which
       | would enable some potentially new modes that would not be
       | entirely dissimilar to every line a BADLINE.
       | 
       | Right now I'm mucking around with getting the RP2350 to output
       | video constructed a scanline at a time, using as little CPU as
       | possible. I got three layers of tiles and two layers of sprites
       | each with different pixel formats working yesterday. Quite
       | pleased with that. The CPU calculates a handful of values per
       | scanline, but fetching tilemap data, then tile data, then
       | conversion to pixel values, transparency and palette lookup are
       | all DMA and PIO. Does 1,2,4, and 8 bits per pixel, each
       | tile/sprite/imagebuffer layer with independent 24 bit palettes.
        
         | topspin wrote:
         | You have such ponderings in common with engineers@work:
         | 
         | https://eaw.app/pico6502/
         | 
         | "and palette lookup are all DMA and PIO"
         | 
         | PIO is a revelation.
        
           | teaearlgraycold wrote:
           | I do love the PIO. I want to show it to a computer engineer
           | from the 80s.
        
             | zeckalpha wrote:
             | Not all that different from the MCS-96 HSIO.
        
           | Lerc wrote:
           | It's great, but I think the critique from the other day was
           | also pretty valid. and offered an alternative.
           | 
           | https://www.bunniestudios.com/blog/2026/bio-the-bao-i-o-
           | copr...
           | 
           | I think, for my use, just having the ability to write to DMA
           | registers would have been a big advantage. It feels wasteful
           | to have A DMA waiting on a FIFO just to write what it gets to
           | DMA registers to do the transfer you actually wanted.
           | 
           | Looking at the Architecture diagram It seems like it could
           | have allowed that and stayed on the same side of the AHB5
           | splitter.
        
       | YasuoTanaka wrote:
       | This is less of a "CPU replacement" and more of a bus-level
       | participant.
       | 
       | Once you control the bus cycle-accurately, the CPU abstraction
       | kind of disappears. You're effectively redefining the whole
       | machine behavior from the outside.
        
       | rahimnathwani wrote:
       | How do the personas work? Does the board direct the Z80 to an
       | alternate ROM stored in the flash?
        
       | jgrahamc wrote:
       | Oh wow. Enhancements for the Sharp MZ line! Wonderful. I spent a
       | lot of time with those machines in the 1980s and own a few. Being
       | able to emulate the Sharp MZ-80K's
       | (https://blog.jgc.org/2009/08/in-which-i-switch-on-30-year-ol...)
       | MZ80FD would be cool.
        
       | uticus wrote:
       | how is "tranZPuter" not "transputer"
       | (https://en.wikipedia.org/wiki/Transputer)
        
         | uticus wrote:
         | and elsewhere on the page, ZPU (FPGA-based microprocessor)
         | sounds a lot like "ZipCPU" FPGA-based microprocessor
         | https://zipcpu.com/
        
       | JVIDEL wrote:
       | So is this just for hobbyists or it has any, say, industrial
       | applications? are there any machines still running on a Z80?
        
         | brudgers wrote:
         | Approximately every old digital technology is still in use
         | industrially.
        
       | boznz wrote:
       | Hot tip: Ignore the RP2350 design sheet and use a standard 1.2V
       | LDO in to provide the internal vCore - you save having to use
       | that weird inductor and can clock it at a 300Mhz much more
       | reliably at 1.2V.
        
         | Lerc wrote:
         | What was the reasoning behind that? Were there specific
         | features of that inductor that led them to choose it, or did
         | they choose it and then found some of their design relied on
         | atypical generic inductor behaviour.
         | 
         | The problem with going off design sheet is you don't know what
         | might change. There's usually a good chance that you are not
         | depending on the difference, but it's the not knowing that gets
         | to you.
        
       | jhallenworld wrote:
       | I want to make something like this as a classic CPU ICE, with
       | trace memory, disassembly, etc. (note that you need a crystal
       | oscillator circuit for many CPUs- 6802, 8085, etc.)
       | 
       | It would be useful for debugging classic computers like Altair
       | 8800, etc. What you do is get a boot trace (record the first
       | 100,000 instructions) of a working machine and diff it with the
       | one from your broken machine. This finds the problem in like 5
       | seconds.
        
       | Dwedit wrote:
       | The one thing that makes a modern computer faster than an 80s
       | computer is _cache_. Without cache, your computer has to go to
       | the memory bus to fetch every instruction and memory read or
       | write, and your system will wait to get the bytes back before it
       | takes any action. You end up at the performance level of an 80s
       | computer.
       | 
       | So you replace the CPU with a faster one with built-in cache. CPU
       | ends up with its own private copy of the RAM and ROM sitting in
       | its cache. But that's not the end.
       | 
       | Computers have a memory map, memory bank switching, memory-mapped
       | IO, and other things to consider. The CPU with its cache has to
       | be kept in sync with the actual memory map of the system. Both
       | the CPU and any memory mapping hardware need to be kept in sync
       | with each other. Memory-mapped IO reads and writes need to go to
       | the actual memory bus at native bus speed.
       | 
       | Then you're left with the issue of other devices that need to
       | access the RAM. This requires cache flushing for writes, and
       | cache invalidation for reads.
        
       | bilekas wrote:
       | I am a newbie to the 'homebrew' hw, have many years in plc
       | systems in various environments with different requirements.
       | 
       | I love for reasons maybe unexplainable my Teensy2.. I want this
       | one too. I feel this hobby is going to become very expensive. I
       | have an old family Tandon and I'm getting ideas.
        
       ___________________________________________________________________
       (page generated 2026-04-09 23:00 UTC)