[HN Gopher] The RISE RISC-V Runners: free, native RISC-V CI on G...
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       The RISE RISC-V Runners: free, native RISC-V CI on GitHub
        
       Author : thebeardisred
       Score  : 100 points
       Date   : 2026-03-26 15:17 UTC (3 days ago)
        
 (HTM) web link (riseproject.dev)
 (TXT) w3m dump (riseproject.dev)
        
       | Western0 wrote:
       | Perfect for snooping on other people's projects. No one in their
       | right mind would touch this. It's cheaper to buy the board
       | yourself.
        
         | mhitza wrote:
         | It seems to be a Linux Foundation project, my trust is implicit
         | higher than what you're claiming. Why wouldn't _you_ trust
         | them?
         | 
         | It's also aimed at open-source projects, for free, with the
         | intent to improve RISC-V support.
        
         | ctz wrote:
         | people better not be snooping on my public open source
         | projects!
        
         | LeFantome wrote:
         | RISE is supported by many legit companies. Stealing is for sure
         | not the intent.
         | 
         | The idea is to promote testing on RISC-V and to eliminate lack
         | of hardware for being the reason not to. Obviously, low budget
         | projects and Open Source are the primary targets. Commercial
         | products can afford real RISC-V hardware.
         | 
         | This is who you are trusting: https://riseproject.dev/members/
        
         | jubilanti wrote:
         | Yes, what a devious plan: give open source software projects a
         | free CI service so you can... read their open source software
         | code?
        
           | downrightmike wrote:
           | diabolical
        
             | throawayonthe wrote:
             | devious
        
               | sethops1 wrote:
               | duplicitous
        
       | IshKebab wrote:
       | Very good move. Hopefully GitHub won't ruin this with their CI
       | charging changes.
        
       | woodruffw wrote:
       | I'm a fan of this, although I'm concerned about the
       | security/trust model: using a third-party CI orchestrator on top
       | of GHA means trusting them with all of your secrets, potentially
       | sensitive logs, etc. Those concerns are somewhat lessened in the
       | context of public repos, but even public repos contain nontrivial
       | workflows that use configured secrets.
        
       | stabbles wrote:
       | My experience with RISC-V so far is that the chips are not much
       | faster than QEMU emulation. In other words, it's very slow.
        
         | OsrsNeedsf2P wrote:
         | Oftentimes slow is fine, when the work is parallel and the
         | hardware is cheap
        
           | pelasaco wrote:
           | which, sadly, isnt the case right now
        
             | dlcarrier wrote:
             | It is the case for embedded microcontrollers. An ESP32-C
             | series is about as cheap as you can get a WiFi controller,
             | and it includes one or more RISC-V cores that can run
             | custom software. The Raspberry Pi Pico and Milk-V Duo are
             | both a few dollars and include both ARM and RISC-V view.
             | with all but the cheapest Duo able to run Linux.
        
         | LeFantome wrote:
         | That has been the case so far but is changing this year.
         | 
         | The SpacemiT K3 is faster than QEMU. Much faster chips are
         | expected to release over the next few months.
         | 
         | I mean things like the Milk-V Pioneer were already faster but
         | expensive.
         | 
         | One thing that has been frustrating about RISC-V is that many
         | companies close to releasing decent chips have been bought and
         | then those chips never appear (Ventana, Rivos, etc). That and
         | US sanctions (eg. Sophgo SG2380).
        
         | k_roy wrote:
         | Same experience here.
         | 
         | At least for SBCs, I've bought a few orange pi rv2s and r2s to
         | use as builder nodes, and in some cases they are slower than
         | the same thing running in qemu w/buildx or just qemu
        
         | wyldfire wrote:
         | Some of that could be related to the ISA but I'm hoping that
         | it's just the fact that the current implementations aren't
         | mature enough.
         | 
         | The vast majority of the ecosystem seems to be focused on uCs
         | until very recently. So it'll take time for the applications
         | processors to be competitive.
        
       | camel-cdr wrote:
       | Sadly still on quite old hardware, with no RVV. Hopefully
       | scaleway will have some newer servers in the future and this can
       | be simply updated to the new devices.
        
         | LeFantome wrote:
         | You can get RVV instances from Saleway.
        
           | camel-cdr wrote:
           | Oh, cool, I didn't see them on the website.
           | (https://labs.scaleway.com/en/em-rv1/)
        
       | boredatoms wrote:
       | ..is this RVA23?
        
         | LeFantome wrote:
         | Not yet
         | 
         | RV64GC (C910 cores)
        
       | singpolyma3 wrote:
       | GitHub only :(
        
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       (page generated 2026-03-29 23:00 UTC)