[HN Gopher] x86 architecture 1 byte opcodes
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x86 architecture 1 byte opcodes
Author : eklitzke
Score : 61 points
Date : 2025-10-31 17:49 UTC (5 hours ago)
(HTM) web link (www.sandpile.org)
(TXT) w3m dump (www.sandpile.org)
| GeorgeTirebiter wrote:
| I don't understand, without further description of the symbols.
| jcranmer wrote:
| The explanation of the symbols is largely found here:
| https://www.sandpile.org/x86/opc_enc.htm
|
| Essentially, the uppercase letter of an operand is a
| combination of the operand type (immediate, register, memory)
| along with how that is encoded (as ModR/M bytes have a register
| and a register/memory field), while the lowercase letter is the
| size of the operand (largely 8-bit/16-bit/32-bit/64-bit for the
| 1-byte opcodes).
| mras0 wrote:
| Not sure why you're being downvoted. You need a to know quite a
| bit of esoteric knowledge to parse this beyond knowing x86
| opcodes (even x86 assembly).
|
| It's more or less the same information you get from the intel
| manuals (specifically appendix 2A of https://www.intel.com/cont
| ent/www/us/en/developer/articles/t...). There you can also see
| what e.g. "Jb" means (a byte sized immediate following the
| instruction that specifies a sign-extended relative offset to
| the instruction).
|
| One-byte opcodes here differs from 2 byte opcodes (386+ IIRC)
| prefixed by a 0F byte and even more convoluted stuff added
| later.
| charcircuit wrote:
| >Not sure why you're being downvoted.
|
| I downvote people when they say they don't know what
| something is when they could have used a LLM to explain it to
| them.
| Rietty wrote:
| What if the LLM gives them bad information and they don't
| know it? I personally would also just ask in a thread than
| risk the LLM info.
| jrockway wrote:
| I never punish people for asking a question. It's how you
| learn!
| mras0 wrote:
| The link is to an opcode map with strange abbreviations
| with no apparent explanation. Asking "What am I looking
| at?" without doing any research (with a LLM or otherwise)
| is entirely reasonable.
| charcircuit wrote:
| It is entirely reasonable, but these kind of comments are
| essentially wishing sites could cater to their knowledge
| level.
|
| It's like complaining that the article is not written in
| French. It's noise in the comment section of an article.
| If someone wants such a thing, browsers have
| functionality to translate pages to French. Not every
| site needs to have their own French translation to suit
| such a person.
| wewtyflakes wrote:
| They were not asking for the website to change; they were
| asking for context so that they can appreciate the
| website.
| charcircuit wrote:
| In this case the person was not asking anything. The
| person was stating they didn't understand. The equivalent
| in my analogy is a French speaker commenting that they
| don't understand English without further translation into
| French.
| mras0 wrote:
| I understand what you're getting at, but in this case
| even I (who know what most things on that page means)
| struggle to understand why it was submitted. Are we
| looking for the 0E opcode? New optimization
| opportunities?
|
| Genuinely asking, for this post did you click on the link
| and say "yeah, I got the point" or did you involve an
| LLM? If you did, what did you ask it? I'm asking because
| I want to get better at LLM use (Another example post
| (and prompt) where you've used this, that's also fine)!
| bigstrat2003 wrote:
| So you would rather people ask a machine that is known to
| be unreliable and have no idea what it's talking about,
| than ask a forum of technically skilled people who will
| give them a good answer. That doesn't seem very reasonable
| to me.
| sparkie wrote:
| You realize that LLMs are trained on human discussions
| right?
|
| If everyone stops asking questions and asks the LLM
| instead, there is no new training data for future LLMs to
| learn from. They will stagnate, or consume their own slop,
| and regress.
| Sharlin wrote:
| Need a couple of instructions for accessing memory (and possibly
| loading immediates) but otherwise seems like a perfectly adequate
| general-purpose instruction set. Might be fun (for some values of
| "fun") to write a compiler backend for it.
| jeffbee wrote:
| Tons of these have immediate operands. The question becomes is
| ADD with an implicit register destination and an immediate
| value in the next byte a "1-byte opcode"?
| Sharlin wrote:
| Yes, indeed. I'd allow only mov to have a memory or immediate
| parameter as the only exception to one-byte encoding.
| themafia wrote:
| You've always got the stack segment (SS) to play with and
| there's also:
|
| https://www.felixcloutier.com/x86/xlat:xlatb
| sparkie wrote:
| They're one byte opcodes, but not one byte ops. Most of them
| have operands which are encoded in a ModRM byte which follows
| the opcode. The ModRM may be followed by a SIB byte, and that
| may be followed by a a variable size immediate|displacement.
| There are also optional prefixes to the opcode.
| GuB-42 wrote:
| Hello sizecoders ;)
|
| Additional resources:
|
| http://www.sizecoding.org/wiki/DOS
|
| A nice PDF with similar content:
|
| https://pnx.tf/files/x86_opcode_structure_and_instruction_ov...
| arjvik wrote:
| Is sizecoding the same as the demoscene?
| classichasclass wrote:
| You could call it a sub-scene of the demoscene, I suppose.
| mras0 wrote:
| Size optimizing assembly code finds use in a variety of
| places. Demoscene for size constrained things is one of them,
| but also "hacking"/exploits and of course "whitehat" stuff
| (patches / compiler optimization etc).
| sagacity wrote:
| Relevant link to the current masters of the sizecoding niche:
| https://marqueedesign.demoscene.com/
| hornd wrote:
| What does the 0eh comment mean?
| layer8 wrote:
| https://news.ycombinator.com/item?id=45608285
| rkagerer wrote:
| 0eh? It's for Canadian segment addresses; pushes that CS
| register all the way home past the 49th parallel.
| johnisgood wrote:
| Slightly off-topic, but in FASM, you could do something like:
| ; reg indices: eax=0, ecx=1, edx=2, ebx=3, esp=4, ebp=5, esi=6,
| edi=7 macro mov_r32_imm reg, imm { db 0xB8 + reg
| dd imm } start: mov_r32_imm 0,
| 0x11223344 ; MOV EAX, 0x11223344 mov_r32_imm 2,
| 0xdeadbeef ; MOV EDX, 0xDEADBEEF
|
| It is quite cool!
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