[HN Gopher] A history of ARM, part 1: Building the first chip (2...
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A history of ARM, part 1: Building the first chip (2022)
Author : ibobev
Score : 106 points
Date : 2025-09-23 20:55 UTC (3 days ago)
(HTM) web link (arstechnica.com)
(TXT) w3m dump (arstechnica.com)
| philomathdan wrote:
| Part 2: https://arstechnica.com/gadgets/2022/11/a-history-of-arm-
| par...
|
| Part 3: https://arstechnica.com/gadgets/2023/01/a-history-of-arm-
| par...
| pinewurst wrote:
| (2022)
| rubatuga wrote:
| Now they are trying to extract every penny from its licensees and
| competing with their customers.
| BallyBrain wrote:
| I love the Acorn story and British computing in general. BBC made
| a good movie on the subject called Micro Men. Definitely worth a
| watch despite some inaccuracies. Note that Sophie Wilson was
| previously known as Roger Wilson and has a cameo at the end of
| the film.
| afandian wrote:
| For anyone interested in this era. I have a couple of sets of
| RISC OS 2 ROMs chips from 1988 sitting on my desk. I don't know
| if they still work. If there's a good home in the UK I'd be happy
| to post them.
| devnullbrain wrote:
| The Centre for Computing History may be interested
| afandian wrote:
| Thanks, I'll get in touch. But I imagine that there are lots
| of them floating around due to OS upgrades.
| ochrist wrote:
| Nice article. Just a couple of comments:
|
| Doesn't the x86 chips also use microcode? There are several
| differences between RISC and CISC not mentioned here.
|
| (also Sophie was called Roger at this point in time, so the
| article has been retconed)
| Symmetry wrote:
| Yes, the 80286 used microcode and so instruction took several
| cycles. That's what the article was gesturing at when it said
| "But another reason was that more complex instructions took
| longer for a chip to execute. By keeping them simple, you could
| make every instruction execute in a single clock cycle."
|
| EDIT: Though later, in the Pentium era, x86 started to do
| simple instructions like `ADD AX, [BX]` without microcode.
| monocasa wrote:
| Eh, that's just an internal design decision. The ARM1 used
| microcode as well.
| jecel wrote:
| ARM1 had multicycle instructions (LDM and STM) and the ARM2
| added more (MUL and MLA) but as far as I know these were
| controlled by hardwired finite state machines, not
| microcode.
| monocasa wrote:
| https://www.righto.com/2016/02/reverse-engineering-
| arm1-proc...
| jecel wrote:
| Thanks for the link. As Ken points out at the end,
| "Probably the biggest objection to calling the ARM1
| microcoded is that the designers of the ARM chip didn't
| consider it that way.[4] Furber mentions that some
| commercial RISC processors use microcode, but doesn't
| apply that term to the ARM1". My opinion is the same as
| Steve Furber's, though I can certainly see Ken Sherriff's
| viewpoint.
|
| In theory PLAs and ROMs are fully equivalent. In
| practice, while the ROM can accept any possible
| "microcode", a PLA might have to be enlarged if you want
| to change some of the "micro instruction". This need to
| change the hardware to change the functionality of an
| instruction is what makes me consider this design
| hardwired instead of microcoded.
|
| [EDIT] Another issue is that the ARM1 has three pipeline
| stages. The "microcode" here is not used for the fetch
| and decode stages, only the execute one. So though
| register to register operations take 3 clock cycles to
| execute, only one "micro instruction" is needed (the
| second line in the table).
| LarsDu88 wrote:
| I felt this article didn't really explain why a RISC chip with
| more ops could be as fast as a CISC chip with fewer ops.
|
| I think the actual explanation is that the CISC ops are decoded
| to more or less the same or similar types of RISC ops, but
| requiring more physical hardware to do the decode, correct?
|
| The tradeoff here being lower memory for instructions, but more
| silicon+transistors needed for decode hardware.
| klelatti wrote:
| May also be of interest on the history of ARM - up to 1997:
|
| https://thechipletter.substack.com/p/the-arm-story-part-1-fr...
|
| https://thechipletter.substack.com/p/the-arm-story-part-2-ar...
|
| https://thechipletter.substack.com/p/the-arm-story-part-3-cr...
|
| This interview with ARM's first CEO Robin Saxby is also really
| entertaining and informative. His energy is really infectious:
|
| https://www.youtube.com/watch?v=FO5PsAY5aaI&t=1823s
| fidotron wrote:
| I think there's a case that Saxby himself was more responsible
| for ARM's success than the technical merits their early designs
| may or may not have had.
|
| What those early Archimedes systems demonstrated was that the
| whole thing did actually work, but their design was not what
| the market needed. Saxby was the right guy to lead them, and
| his energy just seems like something else.
|
| Sophie (a major computing hero for many in the UK in my era)
| went on to do esoteric VLIW work at Broadcom for ADSL iirc.
| klelatti wrote:
| Agree 100%. I think that without Saxby there would be no Arm
| as we know it today.
|
| IIRC Steve Furber and colleagues considered the licensing
| model and decided it would never work. Saxby made it work.
| All credit to him too for standing down before he overstayed
| his welcome and keeping out the limelight since.
|
| Yes, re Sophie it was Firepath I think as per this
| presentation (2014).
|
| https://old.hotchips.org/wp-
| content/uploads/hc_archives/hc14...
| nxobject wrote:
| > The ARM chip was also designed to run at very low power. Wilson
| explained that this was entirely a cost-saving measure--the team
| wanted to use a plastic case for the chip instead of a ceramic
| one, so they set a maximum target of 1 watt of power usage.
|
| With my (limited) understanding of how ARM conquered the market,
| I guess this turned out to be a very consequential cost-saving
| measure.
| joz1-k wrote:
| BTW, there are also other interesting, low-power RISC
| architectures that are used in millions of devices, but most
| people have never heard of them. For example: *
| SuperH [0], 32bit only, now basically dead, but microcontrollers
| are still available * AVR32 [1], 32 bit only, also quite
| dead * ARC [2], 32/64bit, still quite popular in an
| automotive
|
| [0]: https://en.wikipedia.org/wiki/SuperH
|
| [1]: https://en.wikipedia.org/wiki/AVR32
|
| [2]: <https://en.wikipedia.org/wiki/ARC_(processor)>
| klelatti wrote:
| IIRC Arm licensed 'short instruction' encoding from Hitachi
| where it had been used SuperH to create Thumb which was key in
| getting Arm into phones.
| nasretdinov wrote:
| > In fact, one of the first test boards the team plugged the ARM
| into had a broken connection and was not attached to any power at
| all. It was a big surprise when they found the fault because the
| CPU had been working the whole time. It had turned on just from
| electrical leakage coming from the support chips.
|
| So this not an urban legend after all, and it's about the first
| ever ARM CPU! Very cool story indeed
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