[HN Gopher] Non-Determinism and Overcount on Modern Hardware Per...
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       Non-Determinism and Overcount on Modern Hardware Performance
       Counters [pdf]
        
       Author : luu
       Score  : 37 points
       Date   : 2024-08-30 08:01 UTC (2 days ago)
        
 (HTM) web link (web.eece.maine.edu)
 (TXT) w3m dump (web.eece.maine.edu)
        
       | 7e wrote:
       | The limitations of x86 perf. counters for deterministic replay
       | have been known far earlier than 2021; in industry around 2005 or
       | so. It would be nice if there were more efficient hardware
       | support for determinism, especially multi-core.
        
       | dlenski wrote:
       | Interesting read.
       | 
       | It's quite intriguing that x86-64 processors _of different
       | microarchitectures and from different vendors_ basically all have
       | similar non-determinsm for retired instruction counters but -- at
       | least in the authors' brief review -- IA64 (Itanium), POWER, and
       | SPARC appear to be too deterministic.
       | 
       | I can't really see any good explanation for why this would be
       | hard to get right specifically on x86-64. Can anyone else?
       | 
       | (And are there any more recent or thorough results on other
       | archs, particularly arm64?)
        
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       (page generated 2024-09-01 23:02 UTC)