[HN Gopher] TSMC experimenting with rectangular wafers vs. round...
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TSMC experimenting with rectangular wafers vs. round for more chips
per wafer
Author : alok-g
Score : 36 points
Date : 2024-06-21 19:17 UTC (3 hours ago)
(HTM) web link (asia.nikkei.com)
(TXT) w3m dump (asia.nikkei.com)
| johnea wrote:
| They are still going to have to cut the edges off of round
| waffers to make them square.
|
| The process of drawing the ingots leads to inherently round
| waffers. This is something that is not done by the foundary, but
| by a vendor.
| throwup238 wrote:
| The spin coating process that applies etch resist also favors
| round wafers but if they've figured that part out, it's a win
| because their precision positioning equipment is limited to a
| square X/Y stage. With round wafers, they lose quite a bit of
| that space and the wafers are so cheap that wasting some edges
| isn't a big deal compared to the reduced overhead per chip.
| adolph wrote:
| By squaring the circle, they gain by holding less non-
| addressable space in the etching step?
| LeifCarrotson wrote:
| Why is the precision positioning equipment limited to a
| square stage? Or is it actually a rectangular stage?
|
| Couldn't they use an r-theta circular positioning system
| instead of linear?
|
| Their optics are fundamentally circular constraints, seems
| like that should drive everything else to a circle.
| jjk166 wrote:
| Sure but cutting down larger ingots only affects the vendor,
| and these rectangular wafers could be handled by the same (or
| at least similarly sized) equipment for all the other
| downstream processes. It's way easier than retooling everything
| to a larger circular diameter in one go.
| dist-epoch wrote:
| Cutting those edges is much much cheaper than throwing away
| incomplete chips at the edges.
| huppeldepup wrote:
| I suspect they're going to start with a rectangular substrate on
| which they'll grow Si and then high electron mobility materials.
| pclmulqdq wrote:
| Making large silicon boules is cheap enough that I'm sure what
| they plan to do is just square off the sides of the boule
| before sawing into wafers. The scrap from that process, since
| it is pure silicon, can just go back into the pot the boule was
| drawn from (it might need some cleaning steps first), so there
| is effectively no wasted silicon.
| jagged-chisel wrote:
| I would imagine, as it stands today, that packing rectangular
| chips into elliptical wafers has a certain amount of waste
| that can also be recycled. Actually, I suppose it would be
| less wasteful to fill the ellipse with rectangles up to the
| safe edge than it would to lop off entire sides of a boule to
| make a rectangle for filling.
|
| I don't mean to insinuate you are wrong - I need an education
| on how this rectangle business is better. Maybe they're just
| trying to remove the "lop the sides off" step?
| pclmulqdq wrote:
| Packing rectangular chips onto circles has waste, but that
| waste cannot be recycled. It has been processed through a
| lot of different steps that contaminate it. I'm not sure if
| it gets recycled, but it's going to be a lot harder to
| recycle than large chunks of pure silicon.
| jagged-chisel wrote:
| Ah, makes sense. I hadn't even considered the process of
| etching the chips. Pretty high contaminant-to-silicon
| ratio for sure.
|
| Thanks for answering!
| tonetegeatinst wrote:
| Is their any blogs or videos about how these ingots are produced?
| The cost of blank wafers for a hobbyist is just so steep that im
| looking into making my own silicone blank wafers.
| ahazred8ta wrote:
| Prices for 8 inch 200mm silicon wafers are under $50, and the
| smaller ones are even cheaper.
| pclmulqdq wrote:
| Last time I checked (about 10 years ago), 300mm wafers of
| decent purity were about $20. If 200mm wafers are now $50,
| this is big business.
| HPsquared wrote:
| What's the value of the completed chips from a 300mm wafer?
| pclmulqdq wrote:
| Nvidia GPUs are about $1 million per 300mm wafer. $100,000+
| per wafer of chips is generally not out of the question.
| wolfi1 wrote:
| how would you achieve the purity you need?
| numpad0 wrote:
| https://en.wikipedia.org/wiki/Monocrystalline_silicon
| bbor wrote:
| We're all just wasting time until someone figures out how to make
| wafers into shells that nest together into spheres, right? People
| talk about the end of Moore's law and such, but we've still got a
| whole other dimension to work with...
|
| Gosh, if they let me handle this chip design stuff, I'd have it
| figured out in no time! Looks easy.
| bonzini wrote:
| That other dimension is the one we use to dissipate heat.
| Two4 wrote:
| We should go 4D and start dissipating heat into the past.
| cpuguy83 wrote:
| Wait... global warming... _shakes fist at the future_
| RheingoldRiver wrote:
| Ah, that's how the ice age ended
| xen2xen1 wrote:
| Well, the Earth was in a different point in space in the
| past, so it would not end up on Earth.
| IshKebab wrote:
| And to supply power - some of the crazy powerful AI chips
| like Tesla's Dojo and Cerebras chip need significant copper
| under the chip to get enough power in. I think the Cerebras
| WSI chip is like 5 kW, at low voltage that's a ton of wires.
| dist-epoch wrote:
| You know why elephants move so slowly?
|
| Because the cells in the middle would cook themselves if they
| had the same metabolism as human cells.
| wmf wrote:
| https://en.wikipedia.org/wiki/Square%E2%80%93cube_law
| MrLeap wrote:
| Hexagonal chips when?
| s0rce wrote:
| seems hard to dice
| haneefmubarak wrote:
| IO OR L4$ triangle tiles, main chip hexagons
| pitaj wrote:
| It would only require double the cuts, right?
| ajb wrote:
| The problem with that is that you can't do it by making
| straight chord slices of the the wafer - each cut has to
| terminate or it will go through the middle of the next hexagon.
| But it does sound plausible - surely lasers could do this more
| easily than retooling the whole lithography pipeline for
| rectangular wafers. But you'd think they would have thought of
| the idea.
|
| You could do triangular chips with straight cuts. But I that
| would divide the area more finely, which is the opposite of
| what they need.
| azornathogron wrote:
| With chiplet based designs, how big are the individual
| chiplets? Would triangles make sense in that context?
|
| (Asking from total ignorance)
| dev_tty01 wrote:
| I would say never. Hex gives no advantage over round. Both have
| waste when dicing. Square gives the least amount of waste.
| BitwiseFool wrote:
| Squares tessellate better than hexagons so I have no idea
| what advantage hexagons could bring.
| lawlessone wrote:
| If we're suggesting shapes can I suggest one on the surface of
| pipe that wraps back around on itself? So I can run coolant
| through the middle.
| HPsquared wrote:
| Reminds me of Soviet nuclear reactor designs, where the fuel
| rods were hexagonal (instead of the square Western ones).
| robocat wrote:
| > It takes the deep pockets of chipmakers like TSMC to push
| equipment makers to change equipment designs.
|
| I presume Apple invests in a lot of the capital costs? Apple
| needs to put it's cash somewhere and they can align that with
| exclusive contractual access to production of leading edge CPUs.
|
| Note that I haven't actually read anything about Apple's
| investment - I'm just hypothetically assuming it. We do sometimes
| hear about the exclusive contracts with TSMC.
|
| Fabs got too expensive: that was why Global Foundries was spun
| out of AMD. Intel now has similar problems as AMD did?
| wmf wrote:
| I think Apple and Nvidia are prepaying TSMC which helps TSMC
| pay for capex.
|
| In other cases I've read about Apple owning machines used by
| their manufacturers.
| cyanydeez wrote:
| In britain theyte called chips
| bigblind wrote:
| It's insane that companies these days are getting rich selling
| chips that aren't even supposed to get fried.
| TanjB wrote:
| No, this is panels from which interposers will be made. Which are
| now larger than chips and rectangular, so wasted edges from a
| 300mm wafer are high. The proposed size is much larger than chip-
| grade ingots.
|
| They don't need perfect silicon. It can be grown on a continuous
| ribbon which is sliced into panel sizes like they do for solar
| cells. If they need a perfect surface they can deposit some pure
| Si to finish it. Maybe we will eventually see that replace ingots
| for chip grade.
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