[HN Gopher] AMD's "Peano" - An LLVM Compiler for Ryzen AI NPUs
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       AMD's "Peano" - An LLVM Compiler for Ryzen AI NPUs
        
       Author : simonpure
       Score  : 29 points
       Date   : 2024-06-08 17:01 UTC (6 hours ago)
        
 (HTM) web link (www.phoronix.com)
 (TXT) w3m dump (www.phoronix.com)
        
       | user_7832 wrote:
       | Does anybody have any idea what sort of things are possible with
       | such a tool?
        
         | almostgotcaught wrote:
         | It's an LLVM fork so basically the same things that are
         | possible with LLVM.
        
           | yarg wrote:
           | According to the article and the Xilinx engineer, it's a
           | backend not a fork.
           | 
           | > "Peano" is the apparent name for their new LLVM compiler
           | back-end supporting the Ryzen AI SoCs and other AMD/Xilinx AI
           | engines. Stephen Neuendorffer of AMD/Xilinx and part of the
           | "Peano team"
           | 
           | > On behalf of AMD, I'm pleased to announce the open sourcing
           | of an LLVM backend for AMD/Xilinx AI Engine processors.
           | 
           | https://discourse.llvm.org/t/peano-llvm-support-for-amd-
           | xili...
        
             | almostgotcaught wrote:
             | yes a new backend was added to the fork of LLVM
        
       | ladyanita22 wrote:
       | Basically this is written in C
        
       | jauntywundrkind wrote:
       | I'm so interested to see what non-ML pipelines end up being
       | possible & useful. Can we cobble these things into sound DSP
       | processors? Or image convolvers? I'm not sure what architectural
       | constraints there would be that would limit things down beyond
       | what llvm can compile.
       | 
       | > _Note that these accelerators include an array of processors,
       | while the LLVM backend only supports a single processor. Support
       | for devices as a whole is available in open source tools based on
       | MLIR_
       | 
       | Would be neat to see what interop with something like IREE looks
       | like. Sure seems like MLIR is leading the rest-of-industry's
       | (non-NV) efforts.
        
         | almostgotcaught wrote:
         | > Would be neat to see what interop with something like IREE
         | looks like
         | 
         | https://github.com/nod-ai/iree-amd-aie
        
         | Archit3ch wrote:
         | > Can we cobble these things into sound DSP processors?
         | 
         | Not any more than the FPGAs they are based on. You need hard
         | floating point for audio. I bet FFTs will be much faster on
         | this hardware, though...
        
       | gumby wrote:
       | Seems like you could only use very small integers or your program
       | size would become enormous.
        
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       (page generated 2024-06-08 23:02 UTC)