[HN Gopher] MeMPA: A Memory Mapped M-SIMD Co-Processor to Cope w...
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       MeMPA: A Memory Mapped M-SIMD Co-Processor to Cope with the Memory
       Wall Issue
        
       Author : PaulHoule
       Score  : 29 points
       Date   : 2024-02-26 22:40 UTC (2 days ago)
        
 (HTM) web link (www.mdpi.com)
 (TXT) w3m dump (www.mdpi.com)
        
       | mpweiher wrote:
       | Ahhh...memories of PixelPlanes[1][2] and SLAM[3].
       | 
       | This has always seemed like such a good idea, I wonder what the
       | factors are that keep it from being successful, and when/if its
       | benefits ever overcome those factors.
       | 
       | [1] https://dl.acm.org/doi/10.1145/74333.74341
       | 
       | [2] http://www.cs.unc.edu/~fuchs/publications/PixelPlanes4.pdf
       | 
       | [3] https://dl.acm.org/doi/book/10.5555/13358
        
         | mikewarot wrote:
         | Inhomogeneity is always the thing that keeps these
         | architectures from being successful, in the end. It's a
         | premature optimization that _seems_ like the right thing to do
         | at any given moment. Then conditions change, you find out that
         | FP32 isn 't needed, and FP8 is ok... then 3 bits... then
         | Trinary... all require new hardware.
         | 
         | Memory that computes directly, in as simple a model as possible
         | is required. Imagine a huge grid of LUTs that just talk to
         | their neighbors, and I believe, you've got an approach that can
         | work for almost any compute task.
        
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       (page generated 2024-02-28 23:01 UTC)