[HN Gopher] Alleged AMD Zen 5 Specs Leak: Twice the Cores, 15% I...
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Alleged AMD Zen 5 Specs Leak: Twice the Cores, 15% Increased IPC
over Ryzen 7000
Author : mkl
Score : 88 points
Date : 2023-09-30 13:09 UTC (9 hours ago)
(HTM) web link (www.tomshardware.com)
(TXT) w3m dump (www.tomshardware.com)
| zamadatix wrote:
| These will finally cross a (useless and arbitrary) gap we've been
| at the doorstep of for the last 3 CPU generations: having enough
| threads in a consumer class CPU to change the task manager from
| line graphs to bar graphs!
|
| In all seriousness, what I like about AMDs approach with the high
| core count complexes is they aren't completely different cores
| like the Intel efficiency cores, they're just slower cores. I do
| wish they'd take that as an opportunity to go crazy with the
| primary cores though, doing something like 4 or 6 asolutely giant
| cores and 16 small cores to give it a bit more than a 15% boost
| for those things which can't take advantage of having a bazillion
| cores available.
| snvzz wrote:
| The Tenstorrent Ascalon RISC-V microarchitecture is, according to
| tenstorrent slides, competitive with Zen5.
|
| Chiplets TBA in 2024. Same year Zen5 will be.
|
| Exciting times.
| brucethemoose2 wrote:
| Tenstorrent made lots of promises, like the PCIe card ML
| accelerators which have yet to retail (and are probably
| obsolete by now).
|
| The proof is in the puddin. Ascalon will be exciting when it is
| sitting on store shelves, and not before.
| Scaevolus wrote:
| Many CPUs have claimed to be competitive with x86, but it
| rarely pans out. Being able to match the IPC on a
| microbenchmark is good, but they often struggle with poorly
| tuned, low bandwidth cache and memory controllers.
| sapiogram wrote:
| I'd say Apple got there with their M1 and M2 chips. But it
| took 10 years of incrementally improving on an already
| commercially viable cpu, unlike what tensortorrent is
| claiming.
| snvzz wrote:
| I would like to think Wei-Han Lien's (who previously led M1
| at Apple) Ascalon team, as well as Jim Keller (CEO), industry
| veterans as they are, definitely use industry standard
| benchmarks, and avoid the mistake of extrapolating IPC from
| microbenchmarks.
|
| But maybe I'm too optimistic?
| sapiogram wrote:
| Given the choice between exaggerating the performance and
| getting funded, and _not_ exaggerating and running out of
| money, I think everyone ends up choosing the former.
| JustLurking2022 wrote:
| I'll bet the publicize whatever benchmark looks most
| competitive to get the next funding. That's no criticism,
| just the way every business somewhat has to work in a
| competitive industry.
| vardump wrote:
| Watt for watt, Apple's M2 demolishes anything x86 has to
| offer so far.
| tails4e wrote:
| Latest zen4 is very competitive power wise with M2, M2
| still has the crown,but laptop battery life is dominated by
| other parts of the system when you're down to 1 to 2 W of
| cpu power for light workloads.
| paulmd wrote:
| only in cinebench or other dense math workloads afaik
| (especially ones that don't use vector extensions on
| ARM).
|
| SPEC benchmarks have M1 Max demolishing x86 in a lot of
| real-world applications. Similarly, in things like CFD
| the M2 Ultra absolutely demolishes server processors let
| alone laptops.
|
| https://images.anandtech.com/graphs/graph17024/117494.png
|
| https://images.anandtech.com/graphs/graph17024/117495.png
|
| http://hrtapps.com/blogs/20220427/
|
| cinebench really just tests one thing, arithmetic
| intensity, and it doesn't represent cache performance,
| branching, reordering, or anything else in a processor.
| but those are actually quite important to real workloads.
|
| let's look at perf/w for, let's say gcc (chrome
| compiles?) or PGBench or something besides cinebench and
| see how the picture looks then.
| tails4e wrote:
| Those charts are at 35w for the Ryzen, so calling that a
| comparison with a server class processor is a stretch. I
| don't see the power of the M2 in those benchmarks, do you
| know what it was for reference?
| elabajaba wrote:
| All those charts are showing older x86 CPUs (on worse
| nodes), and don't contain any Zen 4 CPUs.
| flamedoge wrote:
| Would you say x86 is held back by lack of scalable vector
| processing, limited to AVX512? ARM must be doing
| something better power efficiency and parallel
| processing, that x86 was too complacent in.
| McDyver wrote:
| On the same line, watt for watt, pen and paper demolishes
| anything Apple has to offer. Now and forever.
|
| One single, isolated metric is not the way to compare
| things
| frutiger wrote:
| How much energy do you need to put into a human for it to
| calculate a 10 digit multiplication?
| celrod wrote:
| We supposedly consume about 100 watts at rest. Given that
| my flops are low (less than one!), I don't think I'm an
| efficient processor. At least for floating point
| operations. Producing paper and ink cartridges isn't
| free, either.
|
| I might be competitive with an LLM + GPUs, but I imagine
| it'll demolish me on throughput.
| monocasa wrote:
| I run inference pretty efficiently with those 100 watts.
| hinkley wrote:
| Is anyone else finding that AWS is overcharging for the Zen 4
| CPUS? I get better price performance for m6a vs m6i but the M7
| series is too close to call for my workload.
|
| This is really dampening my enthusiasm for future AMD hardware. I
| wonder if AMD is aware of the damage Amazon is doing to them
| right now.
| [deleted]
| lend000 wrote:
| It makes sense in my case where I want strong single threaded
| performance, but it doesn't seem compelling to switch from
| Graviton if single threaded latency isn't important.
| singhrac wrote:
| Yeah, I found this too. For our specific workloads (data
| science) m7i-flex works well enough that I don't mind, but it
| was not an obvious upgrade from m6a like I expected it to be.
| derefr wrote:
| Supply and demand, I think -- their DCs just don't have that
| many of that instance-type to go around.
|
| On GCP, even to this day, the Zen 2+3 instance type (N2D)
| doesn't _cost_ more than the equivalent Intel N2 type; but you
| get very low _quotas_ for N2D CPUs per project, and they
| aggressively refuse quota increases for them.
|
| I assume that AWS here went with the other option for Zen 4,
| and just raised the price until demand went down enough that
| nobody was hitting the quotas any more. After all, they can
| always lower it later.
| hinkley wrote:
| They've only been out for six weeks. We've just done so many
| migrations in the last few years that it's pretty simple for
| us to upgrade things. Figuring out how many nodes to run is
| the only part that takes brain cells.
| drewg123 wrote:
| I have an "old" 32c/64t threadripper 2990-WX as my primary dev
| machine. I'm really looking forward to a consumer grade Zen5 with
| 32c/64t as an upgrade, as threadripper is now locked to high
| costs OEMs..
|
| In fact, I wonder how much market there will be for threadripper
| once we have 32c/64t consumer grade desktop CPUS.
| colejohnson66 wrote:
| Wasn't Threadripper more of a "because we can" product, not a
| mainstream one? The price jump from the highest end Zens to the
| lowest end Threadrippers seems to indicate that.
| drewg123 wrote:
| Yes, it is basically a prosumer version of the Epyc server
| CPUS, limit to a single socket, and with higher clocks.
|
| What frustrates me is that in the last 2 or so generations,
| you cannot simply buy a CPU. One has to buy an entire system
| from a vendor like Lenovo or HP. When I built my box in 2018,
| the 2990-WX was available for ~$1900. Which is a lot, but
| doesn't match the $5k->10k prices for the entire systems.
|
| There just aren't that many affordable, reasonably efficient
| ways to get >= 32c these days. (and by efficient, I'm
| excluding used server-class boxes from older generations that
| are power hungry).
| stn8188 wrote:
| Similar to what the sibling comment says, I was able to
| find a motherboard/CPU combo from Newegg 2 years ago when I
| built mine around a 3955WX. I'm not incredibly happy with
| the Supermicro board though and sort of wish I went with
| the Asus.
| ciupicri wrote:
| What's wrong with the Supermicro motherboard?
| stn8188 wrote:
| The boot time is long, the BMS programs are awkward (but
| maybe I'm not familiar with server-style BMS programs),
| and I can't get the DDR4 clock as high as it should be
| for my DRAM. There's a chance my UDIMM doesn't support
| the speed I want to run, but it hasn't been a big enough
| deal for me to look into.
| zamadatix wrote:
| How much total memory are we talking and what speed were
| you able to run it at?
| zamadatix wrote:
| You can still just buy the pieces e.g. https://www.supermic
| ro.com/en/products/motherboards/server-b... or https://www.
| serversupply.com/PROCESSORS/AMD%20EPYC%2064-Core... or
| https://servers4less.com/cd8070604480301-intel-xeon-
| platinum..., the same is true for the current Threadripper.
| Most searching for this stuff are expecting to buy a full
| system with support from the vendor though, so that's what
| shows up most of the time. The ratio of those trying to
| build an individual workstation has been decreasing, making
| piecemeal part builds the less prominent way to order. It's
| still around though.
|
| Price... now that's definitely a story :). The current 32
| core Threadripper is around $3,000 itself now. It does have
| some advantages like the 8 memory channels but even just
| trying to build a low core count box with a lot of PCIe
| lanes is an extremely expensive endeavour. I think part of
| it has to do with the gap between the consumer and server
| markets widening over time, it becomes harder to justify
| doesn't something special for the HEDT market.
| tornato7 wrote:
| Indeed, I built a 3U Threadripper Pro server last year
| using the supermicro board. Works great!
| 2OEH8eoCRo0 wrote:
| I'm disappointed in the lack of I/O in consumer chips these
| days. I've had 3930k 4930k and now 1680v2 Xeon and I have
| memory channels and PCIe lanes coming out of my ears.
| Current consumer chips give you maybe 20 lanes.
| zamadatix wrote:
| Things actually end up not that different in the I/O
| department. Yeah, there are only 20 lanes going direct to
| the CPU but the northbridge has the bandwidth to hang
| another true 16 PCIe 3.0 lanes off it (before running
| into contention). At this point you are still an honest 4
| lanes short but half the lanes are 4x faster so things
| like your GPU or high speed NIC don't need to eat 16
| lanes each in the first place. The story repeats on
| memory where, yeah, you don't have 4 memory channels
| anymore... but the actual memory bandwidth is
| significantly higher and the total capacity is about the
| same.
|
| I've got a 13900k NAS build with 14 NVMe drives in it and
| 25G network connectivity. If you do W680 for the
| motherboard instead of the typical boards you get to keep
| the ECC too. Saved me thousands compared to getting
| equivalent I/O and total CPU performance with a server
| board. Reminded me a lot of when I got a 1650v3 prior
| really, "oh, it's kind of just consumer stuff but fully
| loaded", but ran a lot faster (of course).
|
| The hardest part is finding a board which breaks out the
| things out into ports instead of trying to figure out how
| to cram 2 extra cheap "gaming" nics, wi-fi, 50 USB ports,
| or other useless things in statically instead.
| ciupicri wrote:
| What motherboard are you using and were you able to
| install 128+ GB of RAM running at full speed, e.g. 5600
| MT/s?
| derefr wrote:
| > Yes, it is basically a prosumer version of the Epyc
| server CPUS
|
| Threadripper was, yes. Threadripper Pro wasn't. It was a
| workstation CPU. Threadripper was discontinued while
| Threadripper Pro wasn't, because workstation CPUs are
| profitable, while HEDT CPUs aren't.
|
| (AFAICT the HEDT "class" of CPUs only existed for a short
| time when CPU production was such that all the individual
| cores could perform really well, but the die as a whole
| could still fail validation as a server/workstation-grade
| CPU. I think, with chiplets, this just doesn't happen any
| more.)
| ciupicri wrote:
| Right now the problem with consumer grade CPUs from AMD is that
| you can't have 128 GB of memory running at full speed. You need
| to use 4 memory modules which means a lower speed. From
| https://www.amd.com/en/products/cpu/amd-ryzen-9-7950x
| Max Memory Speed 2x1R DDR5-5200 2x2R
| DDR5-5200 4x1R DDR5-3600 4x2R DDR5-3600
|
| There's also the issue of ECC.
| Modified3019 wrote:
| And limited PCIe lanes.
|
| Though theoretically that will stop being an issue when it's
| viable to only hand the gpu 4-8 pcie 5.0 lanes and 1-2 lanes
| to an nvme drive or two. Then there would be plenty left over
| for other things.
| vluft wrote:
| you can at least get 96GB now, with 48GB dimms
| [deleted]
| wmf wrote:
| Are you ignoring EXPO?
| jauntywundrkind wrote:
| Micron is talking up 128gb sticks, coming semi-soon-ish.
| https://www.anandtech.com/show/21077/micron-
| samples-128-gb-m...
| foresto wrote:
| > There's also the issue of ECC.
|
| Does something prevent Zen 5 CPUs from using ECC memory?
|
| Or maybe you mean that ECC puts more load on the memory
| controller, potentially reducing top RAM speed compared to
| non-ECC configurations?
| ciupicri wrote:
| I wasn't commenting on the speed of ECC memory, although
| from what I've seen manufacturers don't offer ECC memory
| modules with a speed as high as non-ECC versions.
|
| Anyway what bugs me about Zen < 4 is that you can install
| ECC memory, but you can't be sure that ECC is really
| working on some motherboards.
|
| For Zen 4 at least there's DDR5 with its on-die ECC, but
| the path to the CPU might still be unprotected.
| foresto wrote:
| > manufacturers don't offer ECC memory modules with a
| speed as high as non-ECC versions.
|
| Indeed, they seem to be aiming their ECC sticks at the
| server market, their "overclockable" sticks at the gamer
| market, and not mixing the two. Perhaps this would change
| if more workstation motherboards officially supported
| ECC.
|
| In the meantime, I suspect today's ECC RAM and X3D cache
| CPUs might complement each other well.
|
| > For Zen 4 at least there's DDR5 with its on-die ECC,
| but the path to the CPU might still be unprotected.
|
| Some Zen 4 motherboards do support ECC. ASUS lists it in
| their manuals and exposes settings for it in their EFI
| setup, for example.
|
| As for being sure that it's working, I suppose that
| depends on the OS. This addition in Linux 6.5 looks
| helpful:
|
| https://www.phoronix.com/news/AMD-EDAC-Ryzen-7000-Series
| deaddodo wrote:
| You can most certainly test ECC functionality on
| unqualified boards using a Linux LiveCD/USB. And there
| are plenty of boards that have gone through the process
| of getting ECC qualified, and advertise the feature.
| ASUS, for instance.
| sapiogram wrote:
| I assume you're also still limited to dual-channel in both
| scenarios?
| ciupicri wrote:
| From the same page: Memory Channels: 2
|
| On the other hand the specifications for Threadripper(tm)
| PRO 5945WX [1] say: Memory Channels: 8
|
| [1]: https://www.amd.com/en/products/cpu/amd-ryzen-
| threadripper-p...
| sapiogram wrote:
| Oof
| wmf wrote:
| I don't think _consumer grade Zen5 with 32c /64t_ will be
| released because the frequency of Zen 5c will be pretty low
| leading to poor single-thread performance.
| satvikpendem wrote:
| I'm looking forward to the 96 core Threadripper, personally. It
| helps for compilation to have as many cores as possible. Not
| sure how the single threaded performance will be however as
| it's slower than the Ryzen series, generally, and I still want
| to game.
| PartiallyTyped wrote:
| What are you compiling, if you don't mind me asking?
| satvikpendem wrote:
| Rust and Dart/Flutter programs, mainly.
| jtriangle wrote:
| Twice the cores leads me to think we're getting ecores
| cjbgkagh wrote:
| I'm happy so long as it can score really high in Cinebench,
| which is probably the most relevant benchmark for my work.
| mlyle wrote:
| From the article:
|
| > We don't know yet what types of cores these new Zen 5 core
| clusters will have. Half of Zen 5's core count could be
| dedicated entirely to Zen 5c efficiency cores, or the entire
| stack could be vanilla Zen 5 performance cores. It could be a
| mix of both since AMD's slides suggest that there will be
| different models featuring FP-512 support and some models with
| low-power cores.
| _hypx_ wrote:
| I think so too.
| scheme271 wrote:
| I don't think it's e-cores so much as a Zen 5 version of the
| Zen 4c cores. So smaller L3 (the 4c has half the L3 that the
| Zen 4 has) and slower clocks. But the compact cores are half of
| the size of the regular cores and about 75% of the power.
|
| The key point is that the cores are otherwise the same so you
| don't have the weird intel situation where the e-cores don't
| support the same instructions as the p-cores.
| skavi wrote:
| > the weird intel situation where the e-cores don't support
| the same instructions as the p-cores
|
| Intel didn't have this problem. They simply disabled
| instructions available on P and not on E. They did face the
| scheduling issues inherent in heterogenous systems. But so
| will AMD.
| 0cf8612b2e1e wrote:
| Does Linux have mechanisms in place to properly utilize ecores?
| Specifically tagging background services so they never jump in
| priority? Or would it be up to me to manually assign affinity?
|
| I read somewhere that part of what makes the iOS experience
| better is tight control over how much CPU background jobs can
| steal.
| lights0123 wrote:
| Linux has had support for cores with different capabilities
| for ~a decade, when arm introduced big.LITTLE. systemd puts
| background services in "slices", which can have properties
| set in bulk. systemctl set-property
| system.slice AllowedCPUs=16-19
|
| Would set the "system" slice to certain pinned cores, but
| there's nothing automatic.
| 0cf8612b2e1e wrote:
| That's interesting and easy enough to experiment. While I
| do not have mixed performance cores, I have been curious if
| pinning processes results in any noticeable smoothness. I
| get annoyed at various Gnome garbage that occasionally
| thrashes.
| noir_lord wrote:
| also has taskset which just lets you say "this PID can run
| on cores 0 through 13".
|
| Not the friendliest mechanism for defining what runs on
| what but it's what I use to make sure that server software
| I really want on the P cores _stays_ on the P cores.
| garaetjjte wrote:
| https://docs.kernel.org/scheduler/sched-capacity.html
| https://docs.kernel.org/scheduler/sched-energy.html
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