[HN Gopher] Unpacking Xilinx 7-Series Bitstreams (2018)
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       Unpacking Xilinx 7-Series Bitstreams (2018)
        
       Author : nuvls
       Score  : 36 points
       Date   : 2023-07-27 19:54 UTC (3 hours ago)
        
 (HTM) web link (www.kc8apf.net)
 (TXT) w3m dump (www.kc8apf.net)
        
       | gsmecher wrote:
       | Project X-Ray [1] and Project U-Ray [2] are the best source for
       | configuration details that Xilinx/AMD doesn't publish. These
       | projects focus, respectively, on the 7-series and UltraScale
       | FPGAs.
       | 
       | [1]: https://f4pga.readthedocs.io/projects/prjxray/en/latest/
       | 
       | [2]: https://prjuray.readthedocs.io/en/latest/
        
       | imstate wrote:
       | This interesting.
       | 
       | A while back I wrote a C++ library to load a bitsteam virtex
       | ultrascale through jtag using FTDIs d2xx driver.
       | 
       | Intel is more closed in the JTAG opcodes for programming the
       | device. I was able to read IDCODES out of the JTAG.
        
       | uticus wrote:
       | Parts 2 and 3 are where it gets really interesting. Unfortunately
       | no part 4 as promised in the Aug 2018 post.
       | 
       | [0] https://www.kc8apf.net/2018/05/unpacking-xilinx-7-series-
       | bit...
       | 
       | [1] https://www.kc8apf.net/2018/08/unpacking-xilinx-7-series-
       | bit...
        
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       (page generated 2023-07-27 23:00 UTC)