[HN Gopher] How the 8086 processor determines the length of an i...
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How the 8086 processor determines the length of an instruction
Author : picture
Score : 52 points
Date : 2023-02-28 17:56 UTC (5 hours ago)
(HTM) web link (www.righto.com)
(TXT) w3m dump (www.righto.com)
| hyperman1 wrote:
| You're writing these almost faster than I can read them. Thanks
|
| Question: Does the 1BL thing imply that the 8086 is not capable
| of detecting useless prefixes? So the next 2 implications are
| correct:
|
| Eg1: lock cs: clc is just treated as clc, and the lock and cs:
| are ignored?
|
| Eg2: The 8086 has no 16 byte instruction length limit, unlike
| some successors. So e.g 16 seg overrides:
|
| Cs: Ds: Es: Ss: Cs: Ds: Es: Ss: Cs: Ds: Es: Ss: Cs: Ds: Es: Ss:
| mov [1234],5
|
| Is just ss: mov [1234],5
| kens wrote:
| I haven't tested a physical chip to verify, but based on my
| simulations I think you are correct. For your second example, a
| side effect is that NMI is blocked until the end of the
| instruction, so you could block the NMI interrupt for an
| arbitrary amount of time.
| hyperman1 wrote:
| Oh wow. NMI blocked, and presumably other interrupts too?
| That means the filling a 64K segment with cs: prefixes will
| lock the CPU completely. IP will wrap around forever, and you
| have created some kind of infinite sized instruction. That's
| kind of cool!
| anyfoo wrote:
| Presumably, yeah. If other interrupts weren't blocked,
| unless PC is somehow saved to be the address of the
| prefix(es), upon exiting from the interrupt you'd resume
| from the "wrong" ("incomplete", lacking its prefix)
| instruction.
| kens wrote:
| Reset happens immediately, so at least that would let you
| escape.
| kens wrote:
| Yes, more 8086 microcode. I'm here for any questions...
| PaulCarrack wrote:
| Love the work Ken, been reading your articles since the early
| 2010s. Do you get paid to write these posts and do the research
| or is this just a hobby? I wish I could find the time to do
| something similar, but between family and work I have zero free
| time to do anything anymore, unlike my 20s that were time spent
| wasted. Would love to know how you do time management if this
| is your hobby.
| kens wrote:
| No, I don't get paid for this. The time-management secret is
| to retire :-)
| anyfoo wrote:
| I met your group at some informal meeting where Eric was
| showing his Monster 6502 (it seems ages ago by now), and it
| definitely gave me a blueprint of how I'd spent my time
| once I retire. :D
| mmastrac wrote:
| Do you ever feel like you'd want to go back to work? I've
| tried a few sabbaticals and always find myself itching to
| work again.
| anyfoo wrote:
| Does the differing prefetch queue size between 8088 and 8086
| lead to any significant differences between the Bus Interface
| Units (or wherever that affects most) of the two chips, or is
| it basically just a "parameter" in the design that could be
| tuned without a lot of knock-on effects?
|
| Also:
|
| > If the queue ran empty, the processor waited until more
| instruction bytes were fetched from memory into the queue.
|
| Does the CPU make any effort to fill up the queue before it
| runs empty?
| manv1 wrote:
| So what you're saying is that the 8086 was sort of stack based
| (like forth), and a given instruction just consumed the number of
| bytes off the stack it needed, then the assumption was the next
| thing on the stack was the next instruction?
| kens wrote:
| The instruction bytes were in a queue, not a stack, so it's not
| really like Forth. It's the same as reading the bytes in order
| from memory except the queue improved performance by reading
| instructions when the bus was otherwise free.
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