[HN Gopher] Reverse-engineering the ModR/M addressing microcode ...
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       Reverse-engineering the ModR/M addressing microcode in the Intel
       8086 processor
        
       Author : picture
       Score  : 37 points
       Date   : 2023-02-27 18:40 UTC (4 hours ago)
        
 (HTM) web link (www.righto.com)
 (TXT) w3m dump (www.righto.com)
        
       | dezgeg wrote:
       | > People often ask if microcode could be updated on the 8086.
       | Microcode was hardcoded into the ROM, so it could not be changed.
       | This became a big problem for Intel with the famous Pentium
       | floating-point division bug. The Pentium chip turned out to have
       | a bug that resulted in rare but serious errors when dividing.
       | 
       | Do we really know whether fixing the Pentium FDIV bug would have
       | actually been in the reach of microcode patching capabilities?
       | Based on googling the FDIV bug is due to errors in some sort of
       | PLA which presumably couldn't have been patched.
        
         | wbl wrote:
         | The Pentium FDIV algorithm could have been changed in microcode
         | Newton-Raphelson to sidestep the issue. Depends on exactly what
         | resources they would have in microcode.
        
       | kens wrote:
       | Author here. Any questions about 8086 microcode?
        
         | colejohnson66 wrote:
         | What happens if you reference a segment greater than 4 in the
         | ModR/M byte? For example, MOV Ew, Sw [8C] with "reg==5". Does
         | the logic just ignore the upper bit?
         | 
         | On an 80186+, you'd get a #UD, but the 8086 doesn't have
         | strictly "undefined" opcodes; everything does _something_.
        
           | kens wrote:
           | I'm pretty sure that the extra bit will get ignored. There is
           | internal circuitry that expands the register number in the
           | instruction to a 5-bit register number. (You need 5 bits to
           | handle 8-bit registers, 16-bit registers, segment registers,
           | and internal registers.) For segment registers, it drops the
           | third bit. But I haven't tested this case, so I can't
           | guarantee there isn't some weird side-effect.
        
         | yukIttEft wrote:
         | When accessing memory, is there also microcode dealing with
         | generating a pagefault when the address is invalid?
        
           | kens wrote:
           | The 8086 doesn't have virtual memory, so there is no such
           | thing as a pagefault or invalid address. For a memory access,
           | the microcode blocks until the bus interface circuitry
           | completes the memory access. If there's physically nothing
           | there, the memory access will either hang or come back with
           | random garbage.
        
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       (page generated 2023-02-27 23:01 UTC)