[HN Gopher] Intel Publishes Fast AVX-512 Sorting Library, 10~17x...
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Intel Publishes Fast AVX-512 Sorting Library, 10~17x Faster Sorts
in NumPy
Author : mfiguiere
Score : 50 points
Date : 2023-02-15 21:09 UTC (1 hours ago)
(HTM) web link (www.phoronix.com)
(TXT) w3m dump (www.phoronix.com)
| mumumu wrote:
| Now we only need a consumer CPU from Intel with AVX-512 enabled.
| Waterluvian wrote:
| Is sorting one of those things that's so common that it deserves
| its own CPU hardware/instructions to aid in performance?
|
| Or does AVX-512 provide a lot of what that would theoretically
| be?
| cbsmith wrote:
| Heck yeah. Sorting is a pretty common operation in tons of
| algorithms, which is why you find some form of a sort function
| in pretty much every language's standard runtime. Sure, this
| won't help much for sorting strings, but numerical sorts are
| still address a significant chunk of problems.
| ygra wrote:
| AVX-512 is not a dedicated sorting instruction set, but rather
| instructions dedicated to doing the same computations in
| parallel over 512 bit wide registers. So you can do the same
| operation in the same time for 8 doubles, 16 integers, or 64
| bytes at once.
|
| Coming up with good usage of those instructions can be tricky.
| It's not just the typical arithmetic things, but also
| instructions that shuffle around values in those registers
| based on values elsewhere and combining all that cleverly then
| can yield speed-ups for algorithms that deal with lots of data
| serially.
|
| A while ago while trying to understand all that (for the older
| instruction sets) I've read this CodeProject article:
| https://www.codeproject.com/Articles/874396/Crunching-Number...
| - AVX-512 is basically similar, just wider. Although I've heard
| it has a few more useful instructions as well that have no
| counterpart in the older instruction sets.
| Aardwolf wrote:
| Thanks Intel for publishing something that's useful on AMD
| consumer CPU's but not on Intel ones.
| RandomTisk wrote:
| AFAIK Consumer Zen4 supports 12 of the 15 AVX-512 extensions,
| do we know for certain this doesn't target one of the ones AMD
| is missing?
| aseipp wrote:
| The newest extension it needs is -VBMI2, which is supported
| by Zen 4. -DQ and -BW are all quite old and very common
| amongst all implementations by this point.
| jeffbee wrote:
| Numpy is something you could expect to find running on a
| workstation and Intel's workstation CPU line has had AVX-512
| continuously since 2017.
| mumumu wrote:
| Alder Lake and Raptor Lake workstation (W680 Chipset) doesn't
| have AVX512 enabled.
| jeffbee wrote:
| Fair. The "entry workstation" thing from Intel is baffling.
| I was thinking Xeon W, but then of course there was the
| Xeon W-12xx that lacked AVX-512.
|
| In short, I was wrong. It would have been more correct to
| say that Intel _has offered_ a workstation part with
| AVX-512 continuously since Skylake.
| posnet wrote:
| It would be interesting to see it benchmarked against the highway
| qsort[1] Google published last year.
|
| [1]
| https://github.com/google/highway/tree/master/hwy/contrib/so...
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