[HN Gopher] 8086 Processor's microcode pipeline from die analysis
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       8086 Processor's microcode pipeline from die analysis
        
       Author : picture
       Score  : 83 points
       Date   : 2023-01-10 18:26 UTC (4 hours ago)
        
 (HTM) web link (www.righto.com)
 (TXT) w3m dump (www.righto.com)
        
       | IYasha wrote:
       | [flagged]
        
         | kens wrote:
         | Archive.org is still working on this page, but it should be
         | available soon :-)
        
       | PaulHoule wrote:
       | I like how the microcode is a bit like VLIW in that each
       | instruction has a move AND and action that are done in two
       | parallel systems simultaneously.
        
         | kens wrote:
         | Yes, the 8086 microcode does get some parallelism, but it's a
         | pretty short Very Long Instruction Word :-) An 8086 micro-
         | instruction is just 21 bits long, while VLIW words are much
         | longer. I'm studying the IBM System/360 Model 50 and its micro-
         | instructions are 90 bits long. A Model 50 micro-instruction is
         | so complex with 28 different fields that it isn't represented
         | by a line of code, but an 11-line block of code.
        
           | PaulHoule wrote:
           | The 8086 is just starting to pipeline so it is starting
           | small.
           | 
           | Recently I did some reading about the Transport Triggered
           | Architecture and for the first time thought "I could make a
           | special purpose microprocessor" and might actually try it
           | with an FPGA. That got me thinking a lot about processor
           | architecture, particularly the ability for one (real or
           | micro) instruction to simultaneously control multiple
           | subsystems.
           | 
           | What I see as problematic though is that the TTA stalls when
           | it is waiting for memory, I think a high performance system
           | based on the TTA would need some kind of programmable memory
           | access engine that would try to schedule fetches ahead of
           | time programmatically... But I think then it is getting
           | pretty hard.
        
             | LargoLasskhyfv wrote:
             | Have you seen https://github.com/MicroCoreLabs/Projects
             | from
             | 
             | http://www.microcorelabs.com/about.html ?
             | 
             | Some of them implement 'Microsequencing'
             | 
             | ( https://en.wikipedia.org/wiki/Microsequencer ) which
             | could maybe be useful?
             | 
             | Conceptually, I mean.
        
       | psychphysic wrote:
       | Can't access :/ Ukraine's blocked?
        
         | [deleted]
        
         | kens wrote:
         | That's strange. Can you send me your IP address and I'll take a
         | look?
        
       | fnordpiglet wrote:
       | [flagged]
        
         | [deleted]
        
         | kramerger wrote:
         | Sorry, but you don't happen to be a famous bending robot by any
         | chance?
         | 
         | On a more serious note, the pipeline layout could be a side
         | effect of how Shima worked with logic and transistor layout
         | simultaneously (he was not involved in 8086, but a lot of
         | design came from his 8080)
         | 
         | https://en.m.wikipedia.org/wiki/Masatoshi_Shima
        
       | kens wrote:
       | Author here to answer all your 8086 questions :-)
        
         | rwmj wrote:
         | When you look at the die shots, do you get any idea of how the
         | masks were drawn in those days? I assume computers of the day
         | would not have been powerful enough for a CAD tool to design a
         | silicon or metal layer of that complexity. Were they designed
         | in smaller parts and then stitched together into a final
         | design? -- perhaps evident by different parts having different
         | design styles, or not quite using all the space between
         | functional units. Were all parts done on a computer, or some
         | pieces hand-drawn?
        
           | kens wrote:
           | There's a detailed article "Recollections of Early Chip
           | Development at Intel". For the first 10 years, Intel drew
           | schematics and layout by hand. In 1974 they started
           | digitizing on a Calma GDS I system. For the 8086, they spent
           | two weeks manually matching the schematics against the drawn
           | plots looking for errors and found 20 errors.
           | 
           | They cut out the drawings on sheets of Rubylith to create the
           | masks. The earliest chips used a "Coordinatograph", a tool
           | where you'd manually enter the coordinates from the drawing
           | and it would move the cutter appropriately. Then they moved
           | to a Xynetics plotter with a knife. The Rubylith sheets would
           | be sent to the mask vendor, who would photographically reduce
           | it down to mask size.
           | 
           | Intel had simulation tools, but they could only simulate 5-20
           | transistors at a time. So they could only simulate small,
           | critical chunks like parts of the ALU.
           | 
           | https://www.intel.com/content/dam/www/public/us/en/documents.
           | ..
        
           | collectordrx wrote:
           | I can perhaps give some insight into this. One step in the
           | mask making process was hand cutting the design into a
           | masking film called Rubylith. Rubylith is made of a backing
           | sheet coated in a UV resistant red film. The design was hand
           | cut into this film on a large scale then used as a "master"
           | to expose smaller copies.
        
           | retrac wrote:
           | > I assume computers of the day would not have been powerful
           | enough for a CAD tool to design a silicon or metal layer of
           | that complexity.
           | 
           | A mask can be stored as a bitmap image, at 1-bit depth, one
           | image per layer. You only need the image large enough to
           | resolve your smallest features. At 10,000 by 10,000 pixels,
           | one layer only takes ~12 megabytes to store uncompressed. (It
           | would be easily compressed, too.)
           | 
           | A late 70s VAX minicomputer would be able to store dozens of
           | such mask images, and could compute the difference between
           | two masks of that size in some tens of minutes,
           | approximately. That'll tell you if any parts overlap.
           | 
           | Using CAD in that way in chip design, dates to at least the
           | 1970s. From there, standard blocks for, basically, copy and
           | paste, are an obvious improvement over scanning in cut-out
           | designs, or setting individual pixels. Actually synthesizing
           | the masks automatically, from high-level hardware description
           | languages, is something that developed gradually over the
           | 1980s.
        
         | fsckboy wrote:
         | sort of a side question, but with all these projects excavating
         | old dies (which are intensely interesting, don't get me wrong),
         | I'm curious if any of the engineers who worked on this stuff
         | originally (such a short time ago) ever pop up to explain how
         | and or why it was done how it was done this way or that?
        
           | kens wrote:
           | I've talked to some of the engineers to get background on the
           | design of the 8086 chip. They also wrote some papers at the
           | time explaining why things were done particular ways. The
           | 8086 patents are also very detailed; many older patents
           | actually provide a lot of useful information.
           | 
           | Patent: https://patents.google.com/patent/US4449184A
        
             | db48x wrote:
             | Everything stalls while waiting for memory.
        
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