[HN Gopher] Tinycpm - CP/M ON A TINY 2040
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       Tinycpm - CP/M ON A TINY 2040
        
       Author : bubblehack3r
       Score  : 37 points
       Date   : 2022-11-15 17:15 UTC (5 hours ago)
        
 (HTM) web link (www.kianryan.co.uk)
 (TXT) w3m dump (www.kianryan.co.uk)
        
       | pjmlp wrote:
       | Of course Turbo Pascal had to be part of the testing. :)
        
       | guenthert wrote:
       | Perhaps understood, but since it's not explicitly stated, it
       | might be worth clarifying that this entails a Z80 emulator to run
       | CP/M for i8080. It's not a new CP/M for ARM abomination ;-}
        
       | reaperducer wrote:
       | I like that he used Zork to test his creation. I use the same
       | benchmark.
       | 
       |  _However_ , in my experience, Zork starting up isn't actually
       | proof of very much. I've had any number of CP/M installations go
       | bad once I got a hundred or so moves into the game.
       | 
       | If he can _complete_ Zork on the Tiny 2040, then great. But just
       | starting it is only half the battle.
        
       | kragen wrote:
       | running cp/m on a 32-bit arm running at 133 megahertz with 264 k
       | of sram, 2-8 megabytes of xip qspi flash, and 4 gigabytes of
       | flash on sd card, is not challenging, though it might be useful
       | 
       | i routinely ran cp/m in 48k or 64k on a 4-megahertz z80, which is
       | about 0.6 dhrystone mips, on one or two 100-kilobyte floppies,
       | with transfer rates of about 1 kilobyte per second. i think cp/m
       | will run in 16k
       | 
       | this arm is as fast as 250 of those machines, it has as much ram
       | as four of them, as much offboard xip program memory as 64-256 of
       | them, and 40000 sssd floppy disks worth of storage, which
       | furthermore can probably transfer data at 10 megabytes per
       | second, ten thousand times as fast as the floppy
       | 
       | also the z80 didn't have a pio programmable i/o pin driver, it
       | had to handle i/o interactions itself instead of outsourcing them
       | to a channel program in pioasm, which slowed down computation
       | 
       | yes, if you're emulating a z80 on arm that entails some emulation
       | slowdown, but it certainly isn't 250x. it might be 8x. if you do
       | dynamic machine code translation it might be less than 2x
       | 
       | instead of calling it 'tinycpm' he should call it 'giantcpm'
        
         | ideonode wrote:
         | Why not just celebrate it for being neat, rather than berate it
         | for not living up to your expectations?
         | 
         | I thougbt it was interesting, and it has inspired me to try
         | something similar on my pico. Especially after rereading Code
         | recently.
         | 
         | Oh, and I assume that tinycpm is because it runs on a Tiny
         | 2040.
        
       | rbanffy wrote:
       | Worth noting a 2040 is a supercomputer by the standards from when
       | CP/M was first released.
        
         | guenthert wrote:
         | Well, kinda, sorta, but as mighty as the RP2040 is, it still
         | pales to the Cray-1 of '76 with its 8MiB of RAM and 160MFLOPS.
         | 
         | The RP2040 beats the Cray for sure in the MIPS/$ category
         | though :)
        
           | mk_stjames wrote:
           | Yea, sadly the two things I wish the RP2040 could have- more
           | SRAM (it only has 264kb) and onboard floating point in
           | hardware. Other than that I love them and I am using Picos
           | for experimentation now.
           | 
           | The Cray M1 may have only been clocked at 80mhz but the FPU
           | could do a floating point mult + add in parallel making the
           | "160 MFLOPS". It's similar to the performance of an ESP32, I
           | think, which is a great FLOPS/$ comparison. A Cray-1 adjusted
           | for inflation would be $35,000,000. A ESP32-S3 dev board is
           | $6.
        
             | GeorgeTirebiter wrote:
             | Most embedded chips have much less RAM in the M0+ space;
             | they tend to have more Flash. The interesting choices for
             | the 2040 are:
             | 
             | 1. More RAM than usual, using ext SPI Flash to load RAM 2.
             | Fancy programmable peripherals 3. TWO cores 4. Very
             | flexible IO mapping. Others do IO mapping, but it's really
             | nice on 2040 5. "Pretty fast" at 133 MHz
             | 
             | and the Total Win (for me)
             | 
             | 6. Integrated into Arduino IDE
             | 
             | As for Floating Point, there are some great packages out
             | there that are optimized for Cortex-M
             | https://www.quinapalus.com/qfplib-m0-tiny.html
             | 
             | There also Q-notation, which uses integer HW to do a sort-
             | of fixed-point 'float'. We used this extensively in the
             | 2016 Model X body controls, because the falcon wing door
             | was totally controlled without a floating point processor!
             | That was hard to do...
             | https://en.wikipedia.org/wiki/Q_(number_format) Motorola,
             | err, I mean, Freescale provided an excellent library for
             | their automotive-qual PowerPC MPUs.
        
         | myself248 wrote:
         | I was just pondering this recently. A lot of today's
         | microcontrollers have specs comparable to PCs during the heyday
         | of the demoscene.
        
           | pjmlp wrote:
           | That is what I find so interesting about the ESP32, although
           | I have zero uses for it.
           | 
           | Compare it with an PC 1512.
        
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       (page generated 2022-11-15 23:01 UTC)