[HN Gopher] NeuRRAM - New chip for running large-scale AI algori...
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NeuRRAM - New chip for running large-scale AI algorithms on smaller
devices
Author : nsoonhui
Score : 45 points
Date : 2022-11-11 12:32 UTC (10 hours ago)
(HTM) web link (www.quantamagazine.org)
(TXT) w3m dump (www.quantamagazine.org)
| QuadmasterXLII wrote:
| To address a specific claim in the article: no one is doing AI
| computation using the RAM on the motherboard lol
| synthos wrote:
| If it's so sensitive to device variance, I'd expect that it
| doesn't behave well outside a narrow temperature range.
| NextHendrix wrote:
| It depends, with ReRAM the ion mobility in the dielectric layer
| can be tuned, lower mobility means a higher voltage is required
| across the cell for filament growth but a lower thermal
| dependence.
| bippingchip wrote:
| the problem is the material properties link power and
| variability. This means that you either get good variability
| or higher power consumption, but never good variability at
| low power at the same time
| NextHendrix wrote:
| That's partially true, there are other tradeoffs that can
| be made to optimise power and thermal dependence at the
| cost of something else but both specific use case and fab
| availability/reliability need to be factored in.
| bippingchip wrote:
| Having worked on this for quite a few years (compute in memory
| with a variety of emerging memories: RRAM, MRAM others) with a
| substantial research team, our conclusion ended up being you
| are better off with SRAM based solutions. And most likely
| tightly coupled memory with digital compute is better than
| doing compute in memory.
|
| The newer memories like RRAM are simply not stable enough: too
| much variations, drift with temperature, reliability etc. On
| some cases you can try and re engineer the devices to be better
| suited but they invariably end up being larger, or more power
| hungry, and often both. See for example
| https://ieeexplore.ieee.org/document/9405305 (sorry for the
| paywall - no open access available)
|
| Adding insult to injury, none of these emerging memories can be
| integrated with highly scaled digital CMOS. (22nm is about a
| low as you can go for eg MRAM and RRAM - where they are offered
| as embedded flash alternatives) But you will always need
| flexible, programmable digital compute in order to have an AI
| accelerator that can do more than 1 flavor of resnets.
|
| SRAM, in the meantime does scale relatively nicely and co
| integrates well with digital logic across the whole spectrum
| down to 5nm FinFETs and below.
| NextHendrix wrote:
| On the whole, at this point in time, I agree. For general
| purpose NVM stuff you're better off going with the less
| exotic, but SRAM isn't suitable for this specific use case.
| Some eNVMs are essentially analogue (CBRAM, OxRAM, PCM etc)
| whereby you can partially set a single memory cell much like
| a variable resistor. MRAM obviously had its specific two
| states so is unsuitable for neuromorphic computation, and
| SRAM is the same.
|
| I disagree though that 22nm is the limit for (STT) MRAM and
| ReRAM, they both have excellent scalability.
|
| SRAM scales nicely but is volatile, takes up lots of area and
| obviously isn't BEOL compatible. You can stack MTJs between
| metal layers just fine.
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(page generated 2022-11-11 23:02 UTC)