[HN Gopher] Contrasting Intel AMX and Apple AMX
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Contrasting Intel AMX and Apple AMX
Author : ingve
Score : 28 points
Date : 2022-09-05 20:27 UTC (2 hours ago)
(HTM) web link (www.corsix.org)
(TXT) w3m dump (www.corsix.org)
| corsix wrote:
| The elephant in the room contrast: Apple has been shipping this
| for years, whereas Intel _might_ ship theirs in something later
| this year.
| smoldesu wrote:
| Hasn't Intel been shipping scalar instructions for more than a
| decade?
| timdorr wrote:
| Intel's AMX specifically hasn't yet shipped, but will be
| coming with their new Sapphire Rapids Xeon chips this year.
| Someone wrote:
| The article would have been much better for me if it drew
| conclusions about the usefulness of the two (partial) instruction
| sets.
|
| What can you do easily and what's hard?
|
| I also expected to read something about relative performance of
| the two.
| corsix wrote:
| Performance comparison is hard given that the Intel one hasn't
| shipped yet.
| dougall wrote:
| Yeah, I think Intel's only number so far is "2048 int8
| operations/cycle/core" (as opposed to VNNI's 256):
| https://www.servethehome.com/wp-
| content/uploads/2021/09/Inte...
|
| Which (assuming 1 multiply-add = 2 operations) is the same
| int8 operations/cycle as the Apple M1's float16
| operations/cycle. Intel's 16-bit operations might be the same
| rate, but I'd guess half? That'll almost certainly be at a
| higher clock-speed, and one-per-core rather than one-per-
| four-P-cores. (And I think Apple might have doubled their
| throughput in M2. As you said, performance comparison is
| hard.)
| enzanki_ars wrote:
| Seems to be related to
| https://news.ycombinator.com/item?id=32722510
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