[HN Gopher] Ask HN: Chip startups?
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Ask HN: Chip startups?
Are there any start-ups in the chip space? I think this falls in
the 'sounds like a bad idea' bucket, but could be potentially good
idea.
Author : icu
Score : 58 points
Date : 2022-08-26 18:04 UTC (4 hours ago)
| MontyCarloHall wrote:
| Likely vaporware at this point, but no discussion of chip
| startups is complete without mentioning Mill Computing:
|
| https://millcomputing.com/
|
| It would represent a true architectural revolution if it ever
| actually came to fruition. Lots of past discussion on HackerNews
| over the decade(!) it's been under development.
| Symmetry wrote:
| I guess they're technically a startup, but people working part
| time together for equity with no outside capital isn't what
| what we normally mean by the word.
| Centigonal wrote:
| Lots of cool stuff in the hardware AI space
|
| https://sambanova.ai/ - Enterprise AI and dataflow-as-a-service
| for established moodels
|
| https://www.cerebras.net/ - AI accelerator, trying to compete
| with NVidia
|
| https://www.graphcore.ai/ - Another AI accelerator company - UK
| based
|
| https://femtosense.ai/ - Sparse NNs on very low power chips -
| cool hardware and software challenges
|
| https://sima.ai/ - ML accelerators for embedded applications
|
| https://ambiq.com/ - Not AI, but low power chips for wireless
| using some fancy tech that reduces energy leakage
|
| There are dozens more, these are just the ones I've heard of.
| asciimike wrote:
| Adding a few I know of:
|
| https://groq.com/ - From the team that built the original TPU
| at Google
|
| https://lightmatter.co/ - Light tubes instead of copper
| hbrav wrote:
| Adding one more: https://www.untether.ai/
| [deleted]
| [deleted]
| [deleted]
| hashflu wrote:
| Adding:
|
| https://www.esperanto.ai/ - RISC-V based Tensor computes chip,
| Founded by Intel Hybrid Parallel Computing Vice President Dave
| Ditzel.
|
| https://www.furiosa.ai/ - AI accelerator company which show
| good results in MLPerf benchmark.
| systemvoltage wrote:
| Any chip manufacturing startups? If not Fab, equipment, Fab
| software, etc?
| [deleted]
| phlipski wrote:
| https://mythic.ai/ - analog AI inference engines
|
| https://www.uhnder.com/ - radar on a chip
| synergy20 wrote:
| Mythic.ai laid off 50% recently
| adapteva wrote:
| Here's a compiled list of most of them.
|
| https://github.com/aolofsson/awesome-semiconductor-startups
| Symmetry wrote:
| I worked for Ember for a while which was a startup that produced
| a ZigBee chip. It'll be hard to target cutting edge nodes but it
| can work. I left when they were eventually bought by Silicon
| Labs.
| solomatov wrote:
| Of course there're. Couple of examples:
|
| - https://www.sifive.com/ - RISC-V related company
|
| - https://www.cerebras.net/ - Cerebras (AI accelerator)
|
| Both of categories has other players, these are just two notable
| examples.
| irq-1 wrote:
| OT don't use contractions "there're" at the end of a sentence,
| use "there are." Yesterday I saw a subtitle that did the same
| thing, very confusing.
| pxeger1 wrote:
| What does "OT" mean?
| pavlov wrote:
| "Off topic".
|
| It's a bit ironic that someone complaining about confusing
| contractions is using confusing abbreviations.
| pekim wrote:
| Off Topic
| ov_ov wrote:
| https://infiniteseconds.com/ ~ IP single-chip, energy harvest,
| sensing, flexible, low-power, IOT ready, in-house manufacturing,
| big infrastructure ready. "Paint your Night with Light".
| ahmadmijot wrote:
| Not chip the microchip manufacturing but the chip in chip design
| (IC design) space. I'm currently a part of startup in this area.
|
| It's so costly I don't know how other related startups can
| survive though.
| polalavik wrote:
| This thread reminded me of potato semi. which is always a good
| (but dead serious?) laugh.
|
| http://www.potatosemi.com/
| marcosdumay wrote:
| > I think this falls in the 'sounds like a bad idea' bucket
|
| With enough funding, it's quite a good thing to work on. With
| Moore's law dead, the odds of success of weird chips got much
| better.
| systemvoltage wrote:
| > With Moore's law dead
|
| Jim Keller: Moore's Law is Not Dead:
| https://www.youtube.com/watch?v=oIG9ztQw2Gc
| marcosdumay wrote:
| I'm not watching a 1 hour video, sorry.
|
| I've jumped around it and didn't see any mention of
| cost/transistor going down. So I assume that isn't a
| respected engineer saying the opposite of what all the data
| clearly shows, and instead it's a hyped title to a talk about
| something slightly different.
| new_user8675309 wrote:
| For anyone interested in Ethernet PHYs, we are hiring! IPO'd
| early 2022, fast growing, and still a start-up environment
|
| https://www.linkedin.com/jobs/view/3108025120/?refId=iI7RO%2...
| frozenport wrote:
| Currently living in a Cambrian explosion of AI chips:
| https://www.forbes.com/sites/moorinsights/2019/01/23/2019-a-...
| humanwhosits wrote:
| I can think of SiFive and Tenstorrent
| davidcox143 wrote:
| Integrated Reasoning (S22) is building fast hardware for
| optimization problems.
|
| We currently target AWS F1 FPGA instances, and custom ASICs are
| on our roadmap.
|
| hn@ir.design
|
| https://ycombinator.com/launches/64273
|
| https://integrated-reasoning.com/
| mkoryak wrote:
| https://pulppantry.com/
| runjake wrote:
| I don't mean to be rude, but you could have Googled and gotten a
| pretty rich and interesting set of results:
|
| https://www.google.com/search?q=chip+startups
|
| I'm pretty impressed with the number of AI/neural network
| semiconductor startups right now.
| [deleted]
| mighty_donkey wrote:
| Sure, but HN is a great place to get a filtered list based on
| expert opinion. I love seeing these threads.
|
| A lot of things you see here could've been 'Googled', but
| what's the fun in that?
| eatonphil wrote:
| Plus google results for this sort of thing skew towards
| companies that market well, if at all.
| fragmede wrote:
| Thanks for linking to your Google search. I never would have
| found that otherwise.
| [deleted]
| servitor wrote:
| Rivos Inc. A RISC-V startup supposedly with many ex-Apple
| engineers.
| 0xPIT wrote:
| https://www.silina.io
| 0xbadc0de5 wrote:
| https://tenstorrent.com/
| [deleted]
| pveierland wrote:
| Norwegian chip startups:
|
| - ONiO: Single-chip microcontroller with builtin energy
| harvesting and radio communication, enabling IoT devices without
| battery or dedicated charging.
|
| https://www.onio.com/
|
| - Ascenium: Software-defined CPU without an instruction set.
| Highly parallel architecture with extensive compiler integration.
|
| https://www.ascenium.com/
|
| - Disruptive Technologies: Single-chip compute + sensing with
| built-in battery for 10+ year operation.
|
| https://www.disruptive-technologies.com/
| deaddodo wrote:
| > - Ascenium: Software-defined CPU without an instruction set.
| Highly parallel architecture with extensive compiler
| integration.
|
| This is marketing BS if I've ever heard it. Their "instruction
| set" is LLVM. They're doing nothing more than what Transmeta
| (dynamic/programmable ISA) or Lisp/Arm-Java machines (running
| higher level code at a machine level) did before them.
| pveierland wrote:
| Yeah, agree on the instruction set part - however they are
| moving the abstraction level to a point where there should be
| more room for optimization. I don't know enough about the
| technology to make any judgement - I just know a really smart
| guy who works there. Hopefully it turns into something cool
| :-)
| synergy20 wrote:
| I work for one now, it's very challenging *
| very cash heavy(EDA tools, IP license, engineer wage, fab
| money,etc) * very challenging technically(balance of
| computation, power, size,etc) * lots of work needed on
| the software side(compiler,SDK,optimized libs,etc)
|
| It is in a totally different world comparing to MVP or the lean
| startup concept.
|
| Hardware(circuit board related) startup is already
| challenging(cash heavy, logistic challenges,etc), chip startup is
| 100x more. The later is about more than one hundred people with
| hundreds of millions investment to just get started.
| IshKebab wrote:
| I mostly agree except that I'm not sure I'd say its very
| challenging technically. The logical design itself that I've
| seen is mostly extremely simple, just extensive. Verif is a bit
| fiddly but not really that hard, compared to e.g. writing a
| compiler or automating GUI testing. I don't know anything about
| physical design though; maybe that's really hard?
|
| I 100% agree with your other points though. It costs an
| absolute fortune, and everyone always underestimates the
| software effort. It's probably 5-10x the hardware effort,
| depending on what your chip does.
|
| Also another thing I didn't anticipate is how backwards all the
| tooling _and people_ are in the chip design space. CI is a
| novel concept. I 'm sure there are companies not using version
| control. Everything runs on TCL which is on par with BASIC.
| SystemVerilog is not a good language (though it does at least
| have an amazing reference manual). The standard verification
| method (UVM) is ok from an actual verification point of view
| but basically a who's who of worst practices from a programming
| point of view.
|
| Maybe it's different elsewhere but I was amazed how much
| convincing I had to do to get people to adopt practices that
| are just taken for granted in the software world, like auto-
| formatters. There are a lot of luddites.
|
| The only "ok this is actually pretty good" thing I've seen is
| formal verification which is basically magic.
| bsder wrote:
| > There are a lot of luddites.
|
| In chip design, there are a lot of non-software people who
| have been burned by software people. Given the amounts of
| money flying around, there are always a lot of charlatans
| looking to take a chunk out of you.
|
| We used to do CI--a complete CI on our chip took _4 days_.
| The library took _3 weeks_ to go through CI. Version control
| sucks unless your data is text--generally that 's only your
| Verilog. Tcl is a decent enough language--the problem is that
| the stuff you _write_ is no more than a one off and the real
| product is your chip--so nobody is going to reward you for a
| "good" script in _any_ language. SystemVerilog wasn 't meant
| to be a good language--it's an EDA vendor lockin meant to
| extract maximal money from hardware people.
|
| And I've seen more verification in hardware before shipping a
| product than I _EVER_ have seen in any software role. Yes,
| even those with "good" testing.
| a2tech wrote:
| A sim run for a few of my customers with very basic chips
| might take 48-72 hours on a crazy fast machine. The
| designers are also SUPER concerned with getting everything
| right--with chip design there's no 'fixing' broken parts.
| If you don't get the design right when it goes to the fab,
| that entire run is _ruined_. Millions of dollars and at the
| bare minimum months of set back. It could kill the project
| or even the company.
| ris wrote:
| > Maybe it's different elsewhere but I was amazed how much
| convincing I had to do to get people to adopt practices that
| are just taken for granted in the software world, like auto-
| formatters.
|
| Tell me more about this place where people don't get hung up
| on how I indent my comments.
| Lind5 wrote:
| Semiconductor Engineering does a monthly startup funding report.
| All are chip industry related
|
| https://semiengineering.com/knowledge_centers/startups/
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