[HN Gopher] The trouble with SPIR-V, 2022 edition
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       The trouble with SPIR-V, 2022 edition
        
       Author : Jhsto
       Score  : 16 points
       Date   : 2022-05-23 20:38 UTC (2 hours ago)
        
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       | [deleted]
        
       | my123 wrote:
       | > Modern CUDA uses explicit programmer-managed masks, which is
       | powerful and takes advantage of their hardware specifics. But
       | mis-using the mask can cause a deadlock, as divergent threads
       | could simply never participate in a subgroup operation that
       | expects them to, leaving the other threads to block forever. I
       | can see why this solution leaves to be desired, as it just
       | offloads the problem and the risk of misuse to the user.
       | 
       | Note, on Volta (2017, present on customer since Turing in 2018)
       | onwards, Independent Thread Scheduling is present, with a
       | separate instruction pointer per SIMT thread.
       | 
       | This allows to have atomics across different lanes of the same
       | warp, as such providing the guarantees assumed by the C++ memory
       | model. Quite some modern CUDA apps are starting to rely on that,
       | and as such will not work on Pascal or earlier, nevermind other
       | GPU vendors.
       | 
       | Cooperative Groups are very flexible in CUDA too.
       | 
       | https://docs.nvidia.com/cuda/volta-tuning-guide/index.html#s...
       | 
       | As such, control flow is handled very differently on post-Volta
       | GPUs compared to pre-Volta ones, with pre-Volta more akin to what
       | AMD still does today.
        
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       (page generated 2022-05-23 23:01 UTC)