[HN Gopher] RVVM - RISC-V Virtual Machine
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       RVVM - RISC-V Virtual Machine
        
       Author : rvenjoyer
       Score  : 108 points
       Date   : 2021-07-22 13:44 UTC (9 hours ago)
        
 (HTM) web link (github.com)
 (TXT) w3m dump (github.com)
        
       | ansible wrote:
       | More emulators listed here:
       | 
       | https://riscv.org/exchange/software/
       | 
       | The most popular emulators are qemu and spike. There are even a
       | few emulators written in Rust that aren't on the list:
       | 
       | https://github.com/shady831213/terminus
       | 
       | https://github.com/d0iasm/rvemu
       | 
       | I've messed around with Terminus the most.
        
         | codetrotter wrote:
         | Another, special one:
         | https://github.com/gamozolabs/fuzz_with_emus
         | 
         | It's a RISC-V emulator specially made for fuzzing software.
         | 
         | There's no documentation about it in the repo but the guy that
         | wrote it streamed much of the development of it on Twitch and
         | has put those videos on YouTube. He is also on HN.
        
           | wyldfire wrote:
           | I took a quick skim of the code and nothing obviously popped
           | out at me. How do you preserve architectural behavior of the
           | emulator while 'fuzzing'? How does the emulator know where
           | the boundary of the code under test is?
        
       | qwerty456127 wrote:
       | > Framebuffer graphics, working Xorg with mouse & keyboard
       | 
       | How performant it is? Does it feel usable on a mediocre host PC?
        
         | wolfreiser wrote:
         | Yes of course. I've not tested modern DEs because the emulator
         | is still RV32-only, but xterm with twm works very good.
         | 
         | It's still works with interpreter with 1/3 of QEMU performance.
         | With JIT (which is still WIP) it'll be even faster.
        
           | anthk wrote:
           | Twm is slow on rendering. Choose fvwm, ctwm or cwm.
           | 
           | Source: I tried it on OpenBSD on a "moderm" machine (2007_
           | and with a medium-high load you could see redraws going on.
           | 
           | This never happened to me with FVWM or CTWM.
        
       | [deleted]
        
       | freedomben wrote:
       | Is this work being done by an enthusiast, a company, or something
       | else?
       | 
       | I'm glad it's being done, just curious to know if there's a
       | company with a profit incentive behind it. I don't say that as
       | though it's a bad thing - there are tons of benefits of that.
       | Just trying to understand what's happening.
       | 
       | Regardless, _thank you_ for your efforts! I dream of a day when I
       | buy a high performance RISC-V machine to use as my workstation.
        
         | wolfreiser wrote:
         | There's no company behind, the work was done purely on
         | enthusiasm. The main purpose was education and, because RISC-V
         | boards are not widely available, software porting - including
         | RVVM itself - I ran it on N900, but it was not so fast as I
         | expected. Hopefully this will be resolved when JIT will be
         | finished. As for other projects - Xash3D server was ported to
         | RISC-V thanks to RVVM.
         | 
         | And saying that you've written a virtual machine sounds cool
         | too :)
        
         | ansible wrote:
         | It seems like people like writing emulators for fun, or to
         | learn a particular architecture.
        
       | jhgb wrote:
       | > Framebuffer graphics, working Xorg with mouse & keyboard
       | 
       | Time for someone to port Oberon again? :)
        
       | super_idiot wrote:
       | wtf is this
        
         | Intermernet wrote:
         | Answering in good faith here...
         | 
         | It's a virtual machine for the RISC-V architecture, as is
         | evident from the title.
         | 
         | A virtual machine is software that emulates hardware.
         | 
         | RISC-V is an open-source processor architecture that allows
         | anyone to design, build, emulate and modify the CPU
         | architecture without fear of legal repercussions. RISC-V is
         | currently becoming quite popular due to the release of actual
         | hardware, with more coming in the near future.
        
           | Retr0id wrote:
           | Nitpick: In the general case, a virtual machine doesn't
           | necessarily emulate hardware, it might just be an abstract
           | specification (e.g. the Java JVM)
        
             | tremon wrote:
             | The JVM still is an abstract specification of computer
             | hardware (instruction set, register set, memory
             | organization). That it wasn't designed for hardware
             | implementation is a very minor nitpick.
        
               | jonjacky wrote:
               | But then someone did do a hardware implementation:
               | 
               | https://www.jopdesign.com/ https://github.com/jop-
               | devel/jop
               | 
               | "Due to the small size of the processor, it can be
               | implemented in a low cost FPGA. ..."
        
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       (page generated 2021-07-22 23:01 UTC)