[HN Gopher] Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IME...
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Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
Author : lkcl
Score : 83 points
Date : 2021-07-08 14:03 UTC (8 hours ago)
(HTM) web link (openpowerfoundation.org)
(TXT) w3m dump (openpowerfoundation.org)
| dragontamer wrote:
| A fully open source chip, from Verilog to Fabrication is cool!
|
| It may be 180nm (1999-era technology), but that's still hugely
| important. The world of semiconductor design is incredibly closed
| source and secretive.
| zozbot234 wrote:
| Note that Google has open sourced a full set of design rules
| for a 130nm process (codenamed SkyWater), making fully open
| chip designs also possible for this finer process. 130nm was
| current in the very early 2000s, so it should be possible to
| achieve interesting results with it.
| swiley wrote:
| Didn't they require some closed logic between your stuff and
| all of the I/O?
| KirillPanov wrote:
| Yes, and they still do. They've got a Management-Engine
| type layer that you are forbidden to remove or modify in
| any way, even if you pay the full $10k and do not accept
| any subsidies.
|
| So many people asked about this that the foundry had to
| make a FAQ about it:
|
| https://www.skywatertechnology.com/ufaqs/can-i-customize-
| the...
| zozbot234 wrote:
| This impacts the fab itself, but the design rules can
| still be usable elsewhere since they've been released
| openly.
| throwawaysea wrote:
| What about the tools and processes to manufacture this? Are
| those open source or broadly available? For instance, is it
| possible to have a small scale "community" fab for 1999-era
| chip technology?
| marktangotango wrote:
| Or any other options for "small" batch sizes?
| lkcl wrote:
| yes, Chips4Makers http://chips4makers.io will help anyone who
| wants to do a 360nm ASIC, the costs are ridiculously cheap.
| like... EUR 1750 for 20 MPW samples, something mad, who would
| have ever thought it.
|
| Staf will also "protect" you from the Foundry NDAs. you
| develop with a "symbolic" version of the Cell Library, he
| runs the "Real" one and sends it to IMEC on your behalf.
| here's Staf's "symbolic" Cell Library, it's based on
| FreePDK45 https://gitlab.com/Chips4Makers/c4m-pdk-
| freepdk45/-/releases
|
| Coriolis2 - http://coriolis.lip6.fr/ - is entirely Libre-
| Licensed. it's fully automated, you don't have to do any
| "hand-editing", it has unit tests (so you have demos you can
| look at and also check you installed everything right). we
| have some automated setup scripts for it if you're
| interested: https://git.libre-soc.org/?p=dev-env-
| setup.git;a=blob;f=cori...
|
| LIP6 have a Silicon-proven ENTIRELY Libre Cell Library called
| nsxlib, if you really want to go that route. it's Silicon-
| proven in 360nm and 180nm.
|
| Also, LIP6 have a relationship with a small town in Japan,
| they have 2 micron fab which is used for "training" of
| employees of the town. submission for that is _entirely
| free_. i know this exists but have not used it, and don 't
| know more details, but i can probably put you in touch with
| Sorbonne University if you're serious.
|
| and if you really _really_ want to do "at home" stuff,
| Libre-Silicon is developing a 2in wafer fab, using Ultra-
| Violet DLPs and high-accuracy stepper motors, that you'll be
| able to buy and operate from your garage or lab. think "3D
| printing", i think they're aiming for 2000 nm or something
| (20 micron)? really big, but proves the concept.
| wallacoloo wrote:
| I've been keeping an eye out for anything like this. There's
| Sam Zeloof, doing one-offs in his home lab [1], and there's
| Libre Silicon [2] putting together their fab too, but the
| info there's more scarce.
|
| Neither one has published an easily-replicable process,
| meaning I can't really repeat what they've done. IMO what
| this space needs is an open source build plan/BoM, with a
| cottage industry of people selling DiY and pre-assembled
| kits. Once the 3d printing community got there, that's when
| things took off -- before kits or at least build guides with
| proper BoMs, it was just disparate individuals doing their
| own thing.
|
| Connect me with anyone who's got a good approach to building
| some sort of replicable open-source fab though, and I'll quit
| my job and join the project full-time (that's not a joke: I'm
| serious).
|
| [1] http://sam.zeloof.xyz/category/semiconductor/ [2]
| https://libresilicon.com/
| gnufx wrote:
| Interesting as this is, I'll look forward to version two, to see
| how the vector processing works.
| Narishma wrote:
| I didn't see any specs for this SoC in the article, did I miss
| it?
| marcodiego wrote:
| This is a very important step. I don't understand how this is not
| on the first page. Maybe a more click-baity title is needed?
| swiley wrote:
| Commenting on articles early in their life weights them down
| significantly, if you want something on the front page you
| should absolutely not comment on it until it gets there.
| UncleOxidant wrote:
| That seems counterintuitive. Do you have any data to support
| this?
| marcodiego wrote:
| Thanks for the advice. Didn't know that. Actually, I'm
| answering only because because it finally got to the first
| page.
|
| Off topic: where did you get this rule?
| cdcarter wrote:
| Who is this important for? Is there a lot of software still
| being developed for POWER? It seems niche to me, but maybe I'm
| the one in a niche.
| swiley wrote:
| IMO: the underlying architecture is mostly relevant to
| kernel/compiler authors and people doing aggressive
| optimization. For most application devs it's about as
| irrelevant as you can get (unless your language has a very
| hard to port compiler _cough rust._ )
|
| What's good about this is that the source is available and
| can be verified to some degree against the hardware (by
| decapping it.) That puts a log of constraints on what kinds
| of secret back doors people can build that we didn't have
| before.
| marcodiego wrote:
| AFAIK this is a libre soc developed using libre software
| tools, some of which were developed by the group members
| themselves, free from royalties and independent from any for-
| profit institution. This is probably "librier" than RISCV.
|
| The fact that the POWER architecture may be niche is not a
| problem since so much software can be compiled for it. See
| the thalos workstations: https://www.raptorcs.com/TALOSII/
| and the powerpc notebook: https://www.powerpc-
| notebook.org/en/
|
| For people who are willing to use niche hardware for more
| control on what is running, this is seems like a very
| important step.
| zozbot234 wrote:
| RISCV is an ISA, not a core design much less a complete
| SoC. The closest comparison would be something like Rocket,
| or BOOM.
| addaon wrote:
| The POWER/PowerPC ISA is still widely used in safety-critical
| avionics, where a mature tool-chain exists for supporting
| DO-178 objectives.
|
| In my opinion, an area of interest going forward into the
| next decade of more safety-critical software written by
| smaller and smaller orgs (e.g. eVTOL companies, sensor
| companies, etc) is continuing to push forward which
| objectives can be accomplished by formal means instead of
| primarily through testing.
|
| An NXP or IBM processor might be great, and might be mature,
| and might be very well tested -- but I, as a safety-critical
| software developer, have little way of demonstrating that to
| certification authorities. The availability of open-source
| processor designs and, in the future, traceable and
| accountable conversion from those HDL designs to RTL, to
| masks, and then to silicon, gives a path to showing that
| portions of a processor are correct-by-design, and thus a
| path to the goal of showing that my machine-code-as-
| authored(-by-an-assembler) and machine-code-as-executed(-by-
| a-processor) semantics match.
| cruunchMuncher wrote:
| DO-178 objectives? You mean the same one used in 737 Max?
| addaon wrote:
| I'm not familiar with whether the 737 Max development
| used DO-178B or DO-178C; the latter is a successor to the
| former, but frames the development process significantly
| differently.
|
| Any process can be used well or poorly, and DO-178C isn't
| really a process, it's a set of objectives that a process
| must accomplish. When used in good faith, I believe it
| can lead to software of higher quality than almost any
| other approach (although, to be fair, at higher software
| development cost than almost any other approach). That
| doesn't mean that chanting the document name and using
| hand-me-down rituals is sufficient to achieve high
| quality software, of course :-).
| lkcl wrote:
| > The POWER/PowerPC ISA is still widely used in safety-
| critical avionics
|
| and in the Mars Rover, which is a radiation-hardened 133mhz
| 32-bit Power ISA system.
| phendrenad2 wrote:
| Many things were ported to power over the last ~3 decades,
| and that code is still valuable today.
| Seirdy wrote:
| Many hyperscalar server setups use POWER8/POWER9 CPUs. 4
| logical processes per core (and 8 with the upcoming 15-core
| POWER10 configurations) are pretty useful when measuring
| perf-per-watt.
|
| The Talos is currently the only fully libre computer
| available for high-perf computing, and it uses POWER9 CPUs.
| If you want a fully free CPU, your choices are either very
| dated CPUs or POWER.
|
| Many distros (inc. Debian, and most source-based ones)
| support ppc64/POWER officially quite well and go out of their
| way to ensure a high degree of portability.
| KirillPanov wrote:
| Because it isn't really open source.
|
| https://news.ycombinator.com/item?id=27777223
| fithisux wrote:
| Congratulations.
| cjsplat wrote:
| For SW type people ...
|
| GCC's impact was possible because it was (with GAS - the
| assembler) 100% feasible to have an open source toolchain. Yes
| more software was necessary for a complete system (linker, libc,
| etc), but GCC made it possible to build from the ground floor up.
|
| Also, yes, the initial GCC was worse than any proprietary decent
| tool chain at the time, but it got better and better because each
| improvement built on all the earlier open sourced efforts.
|
| Think about how hard Linux kernel development would have been if
| it had to rely on different proprietary tool chains for every
| target architecture (and possibly chip version).
|
| Hardware definition languages (Verilog/VHDL, etc) enable high
| level chip design like high level programming languages, but
| making the physical chip requires a PDK (process design kit) that
| encodes how each critical silicon feature is built.
|
| So a chip built for TSMC 28nm contains TSMC proprietary material
| and is essentially unportable. It can take several years to move
| a major chip from one foundry to another (or even a shrink at the
| same foundry), and the proprietary tool chains preclude a
| development process that can incrementally improve portability.
|
| This announcement is a a major step toward a similar foundation
| being available for silicon design. It is very important that it
| is a large complex chip, rather than just a research development
| vehicle.
|
| [disclaimer - past life as OpenPOWER participant]
| nickik wrote:
| Google has done a lot of effort in that direction. The first
| ever chips have already been produced that are fully open
| source from the tools used to make to the complete tool chain
| need to manufacture them.
|
| There is a huge amount of great stuff going on this this area.
|
| Tim Ansell - Skywater PDK: Fully open source manufacturable PDK
| for a 130nm process
|
| https://www.youtube.com/watch?v=EczW2IWdnOM
| lkcl wrote:
| interestingly, Libre-SOC and NLnet's funding _pre-dates_ the
| google-sponsored Skywater 130nm process. also, because it 's
| funded by NLnet we're not dependent on google, don't have to
| pass "conditions", and in particular were not forced to use
| OpenLane and were not limited to 48 pins controlled by a
| "Management Engine".
|
| Staf _actually_ developed _actual_ IOpad Cells (from
| scratch), _actual_ Standard Cells and a 4k SRAM block: we did
| _not_ use the NDA 'd TSMC Cell Libraries, here.
|
| if we had used Skywater 130nm we would have been forced to
| ditch LIP6.fr (i cannot express enough how hard Jean-Paul
| Chaput has worked on coriolis2 for the past 18 months), we
| would not have been able to test the IOpads that Staf
| developed... yeah.
|
| bottom line is we used a complete independent VLSI toolchain
| - fully automated - that has nothing to do with the USA or
| DARPA Military funding - and was developed with European
| expertise.
| Taniwha wrote:
| I've worked on big chips designed to be taped out to multiple
| (3) fabs - you have to either build your own libraries that
| have some minimum performance on all processes, or recompile
| with a new fab's libraries - my experience is that if you plan
| for it it's more a matter of a few months than years
| KirillPanov wrote:
| > Symbolic (ghost) versions of FlexLib allowed Libre-SOC
| developers to not have to sign a Foundry NDA during the
| development of the ASIC Layout
|
| In other words, this chip isn't even remotely open-source.
|
| What they sent to the foundry isn't the "ghost cells" (which
| don't have transistors in them and therefore don't work).
|
| This fails the most basic requirements of being open source.
| lkcl wrote:
| HDL source code: https://git.libre-soc.org/?p=soc.git;a=summary
|
| Coriolis2 source code: http://coriolis.lip6.fr/
|
| Chips4Makers FlexLib Cell Library based on FreePDK45:
| https://gitlab.com/Chips4Makers/c4m-pdk-freepdk45/-/releases
|
| Automated Layout scripts for generation of GDS-II Files:
| https://git.libre-soc.org/?p=soclayout.git;a=summary
|
| please do try to get your facts right and not mislead people by
| making false claims, eh?
| test_epsilon wrote:
| What is the problem if they could be translated to a working
| chip? A C program contains no instructions the machine can use
| and yet you can compile an open source program with a closed
| source compiler.
| vfclists wrote:
| What does this mean to noobs like me?
| insulanus wrote:
| Here are a few implications:
|
| * In a few years (maybe 5?), it might be possible to build a
| computer that you can trust has no intentional back doors in
| the CPU, but is modern enough to run software from within the
| last decade.
|
| * If this catches on, and is used by enough people, economies
| of scale might kick in, and bring costs for advanced custom
| chips down by an order of magnitude (if the cpu is small
| enough, and if more fab capacity is built). Not Intel/AMD/ARM
| parts - those prices will remain stable, at first.
|
| * Maybe we can have another decent consumer-grade router? No,
| this is a pipe-dream.
|
| * Our Amiga accelerator boards will become SMOKING fast.
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(page generated 2021-07-08 23:01 UTC)