[HN Gopher] Intel to Adopt SiFive's New High-Performance P550 RI...
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Intel to Adopt SiFive's New High-Performance P550 RISC-V Cores with
7nm Platform
Author : ItsTotallyOn
Score : 81 points
Date : 2021-06-22 13:18 UTC (9 hours ago)
(HTM) web link (www.tomshardware.com)
(TXT) w3m dump (www.tomshardware.com)
| 1MachineElf wrote:
| Let's hope it won't be locked up behind AMI BIOS, Intel's UEFI or
| ME firmware.
| MisterTea wrote:
| If Microsoft jumps in you can 100% count on that nonsense being
| bolted in addition to ACPI.
| schmorptron wrote:
| Yeah, it's a fool's wish but hopefully RISC-V and SiFive stay
| as open as they've been, if they do Intel's cash could really
| usher in a golden age for open computing
| rataata_jr wrote:
| Reads like the Onion, Intel and RISC in the same line. Good news
| for RISC-V though.
| dkjaudyeqooe wrote:
| There's an imperative for Intel to look less moribund and
| conveniently RISC-V has the potential to knobble the
| competition. So this all looks much more promising.
| schmorptron wrote:
| You think they're betting on it to just skip ARM and for it to
| be the next big thing? One thing I'm confused about: Does
| SiFive "own" the RISC-V IP and is just publishing it under open
| licences at the moment, or are they just the biggest and most
| promising company to work with it ATM?
| johndoe0815 wrote:
| Intel had some nice RISC processors, the i860 (used in HPC
| accelerators and the NeXTdimension color graphics card in the
| early '90s), i960 (used in many laser printers) and the XScale
| (next generation StrongARM, technology acquired from DEC, back
| then the fastest ARM CPU).
|
| Unfortunately, they killed them all...
| linuxlizard wrote:
| Intel sold off their X-Scale/StrongARM to Marvell in 2006.
| https://www.theregister.com/2006/06/27/intel_sells_xscale/ I
| was with Marvell at the time and we were pretty excited to
| get it.
| drcongo wrote:
| What happened to it since?
|
| edit: not snark, genuinely know nothing about these things.
| johndoe0815 wrote:
| I think the last Marvell SoCs based on XScale were part
| of the PXA3xx series, which came out in 2006. Since then,
| the ARMv5TE core of the XScale (the original StrongARM
| uses the ARMv4 architecture) has been replaced by more
| recent ARM cores (ARMv7). Details can be found on
| wikipedia as usual
| (https://en.wikipedia.org/wiki/XScale).
|
| The StrongARM and XScale were the basis of so many
| interesting products in the late 1990s and early 2000s,
| e.g. some Acorn RISC PCs, the Apple Newton 2000, the
| Philips IS2630 Inferno phone, Psion's series 7/Netbook,
| the first Compaq iPaq series and other Windows CE-based
| PDAs (many of which were the first mobile devices Linux
| was ported to), and the Netwinder network computer (which
| still has its own web page - http://www.netwinder.org).
|
| The LART by TU Delft was an open source hardware project
| based on the StrongARM (https://web.archive.org/web/20060
| 207043722/http://www.lart.t...) and the Itsy was a
| prototype handheld device developed by DEC WRL to
| prototype mobile applications
| (https://en.wikipedia.org/wiki/Itsy_Pocket_Computer).
|
| Good times...
| kingsuper20 wrote:
| I've written software for all three, plus most of the more
| peculiar TI DSPs and 'graphics' processors.
|
| I dearly miss all of the crazy ecosystems.
| pjmlp wrote:
| I miss that Intel iAPX 432 failed as a project, it looked
| like a great design (it was CISC tough)
| jecel wrote:
| The i960 was the iAPX 432 redone as a RISC:
|
| https://en.wikipedia.org/wiki/Intel_i960
|
| Later versions had the object-oriented / security features
| stripped out.
| Koshkin wrote:
| I wonder how many ARM cores are built into a typical PC
| motherboard and other components these days.
| krylon wrote:
| A while ago, there was an announcement by, I think, Western
| Digital, that they were going to replace the ARMs in their HDDs
| with RISC V.
| johndoe0815 wrote:
| WD is a very active contributor to RISC-V, some of their
| "SweRV" RISC-V cores are open source:
| https://github.com/westerndigitalcorporation/swerv_eh1
| dkjaudyeqooe wrote:
| Does anyone really trust Intel to deliver on 7nm in a timely
| manner? Who's going to bet their business on it?
|
| Even under new management it will take time to sort out the
| dysfunction and replace lost talent.
| jstrong wrote:
| > The Performance P270 slots in as the lower-performance eight-
| stage, dual-issue, in-order processor that supports RISC-V Vector
| Extension v1.0, which SiFive says makes it an ideal candidate to
| replace SIMD architectures.
|
| I did not understand this part. "lower-performance" and "in-
| order" suggest this is a simpler processor, but it could replace
| SIMD? is SIMD used in embedded contexts?
|
| (asking for clarification, not trying to suggest the article is
| wrong.)
| nickik wrote:
| RISC-V Vector is a form of SIMD. So this is a simple(ish)
| processor but you can lots of calculation because of the SIMD.
|
| Yes, it is used in embedded context, processing of input from
| sensor for example. Local machine learning is all the hype
| right now.
|
| "Edge Computing" is the typical buzz word.
| oscardssmith wrote:
| Out of order execution requires a ton of logic (you're
| basically adding a small optimizing compiler in silicon). This
| takes a bunch of area and leads to more complicated data paths.
| The reason high performance cores use it is that it greatly
| reduces pipeline stalls, and as such can make your cpu several
| times faster.
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