https://www.ternary-computing.com/history/CPU-History.html TERNARY COMPUTER SYSTEM last change: December 09, 2024 Summary Introduction Testing CPU Development System Programming and OS What are our next steps? Goals Introduction Hello everyone! I've been working on this project for a while now. What is it about? You should know that I am primarily a software developer, who as a good "veteran" knows (and appreciates) low-level languages (assembly) that inevitably reflect the hardware architecture of the processor to which they refer. My experience as a programmer, combined with a passion for microprocessor architectures, has led me to explore extreme and exotic solutions and one of these is the object of my project: a Ternary microprocessor! For those who don't know, a microprocessor is an electronic device that allows you to load and execute a program stored somewhere. Microprocessors are the heart of all modern electronic devices, not only (as one might think) computers, tablets and smartphones, but also household appliances, cars, robots, data centers, space probes, etc. All current microprocessors are based on a binary representation of information, this simply means that only two pieces of information can pass on each "wire" that communicates with the outside. This may seem like the only existing way to make microprocessors but in reality it is not. No one forbids making it possible for more than two pieces of information to be represented on each wire, by appropriately encoding the voltage levels. For example, a possible solution is to make a ternary processor, making sure that each single wire can handle not two, but three pieces of information. Having three states for each single wire (or communication line) brings significant advantages; you can reduce the number of interconnections and the internal complexity of the processor while having a significant increase in the amount of information processed. For example, having a three-state processor (Ternary) with only 24 wires (24 trits) means having a device that can represent over 270 billion more pieces of information than a commercial 32-wire (32-bit) processor. So 8 fewer wires (and less construction complexity) but with a huge advantage in representing information. (if anyone was wondering: there should be no advantage in terms of the speed of the processor itself, this largely depends on the production process used. However, with the same production process, you can expect a slight increase in speed of ternary processors compared to binary ones in basic operations; for example, adders can finish their carry chain earlier). As evidence of these considerations, there are countless studies and papers that aim to create gates or even native ternary MOSFETs. So what did I create? What I did is a Ternary processor! I focused not so much on the realization of devices on silicon, but on the entire architecture of a ternary processor. We defined registers, basic instructions (ISA), operating modes and interrupt management, etc. After that, we realized it in real hardware to test its operation and also realize the first ternary programs! * 81 General Purpose register * 24 Trit Data Bus * 22 Trit Address BUS [CPU2-reduced] * RISC Architecture with Ternary ISA * specific instructions for ternary logic and arithmetic * 7.5x4.3cm size CPU Board Testing CPU To test our CPU and create the first programs, we built a set of boards with three-state switches and two-color LEDs, we used these boards to be able to insert data into the processor bus and see the output through the two-color LEDs (green = +1, red = -1 and off = 0). Those were really incredible times, when we manually inserted the individual instructions from the switches and saw the result on the LEDs! [leds] [Debug-system] IO system for test CPU Debug system for the 5500FP Ternary CPU Development System Now we have gone further and have also created a "motherboard" that supports our processor and allows us to program it more easily. This motherboard is in miniITX format and contains RAM (binary, where ternary data is stored in a particular way), two serial ports for I/O on a remote terminal and an SDCard reader. The board also has an ethernet chip, an RTC chip and a ternary expansion connector, but they are not yet configured to work. [MainBoard2] Programming and OS The software development is done with a macroassembler under Windows; once compiled, the program is stored on the SDCard and is started on the motherboard.Incredibly we are also trying to write a simple OS that allows the system to be used in a more serious way and at the moment we are struggling with interrupt management, a tiring but really fun job!! [MacroASM] [OS] Cross Assembler Very first version of ternary OS What are our next steps? We have created our MVC and the development system to write the first programs in ternary right now. our final goal is to realize the architecture directly in silicon. We have explored several solutions, some of them use ternary gates directly, but they are currently beyond our reach. For this reason we are creating the schematics and the layout on silicon using a production process whose specifications are free: skywater 130. It is a production process that allows to have mosfets at 150nm, maybe really a lot, but it will certainly allow us to have a VLSI layout for a ternary processor directly on silicon. At the same time we are adding features to the OS so that it is possible to use the processor with a real OS (even if currently limited) and allows everyone to easily explore the advantages of ternary. [STI] [sti2] Ternary Inverter gate Standard Ternary Inverter simulation Goals What is our goal? To create a VLSI layout based on the specifications of our architecture that can be licensed to hardware manufacturers. This is exactly the intention of our business. What are we looking for? We are currently looking for collaborators who can join the project, both engineers and marketing figures. It is clear that we are also looking for funding to bring our product to completion in a relatively short time.