http://rexcomputing.com/ Toggle navigation [REX] * * The Problem * NEO Architecture * The Neo Chip * Development * About * Mail * Contact Now Hiring The Problem Processor architectures have not been rethought for over 25 years, and the end of CMOS scaling will make it increasingly difficult for performance and efficency improvements without a fresh design. --------------------------------------------------------------------- Existing processor architectures were designed in a time where the amount of energy to move data was roughly equal to the amount of energy required to do useful computation with that data. Energy cost for performing a 64 bit FLOP (In picojoules) Moving 64 bits from memory takes over 40x more energy than the actual double precision floating point operation being performed with that data. REX Computing is rethinking the traditional hardware managed cache hierarchy, and in removing unnecessary complexity, is able to significantly reduce power consumption and total area. The REX Neo Architecture --------------------------------------------------------------------- REX Computing is developing a new, hyper-efficient processor architecture targeting the requirements for the supercomputers of today, and all the computers of tomorrow. To do this, we are throwing out the feature creep and bloat of processors of the past 30 years, and using improvements in the world of software to greatly simplify the processor itself to only what is necessary. In doing so, we are able to deliver a 10 to 25x increase in energy efficiency for the same performance level compared to existing GPU and CPU systems [NeoPipelin] The Neo Chip --------------------------------------------------------------------- 256 cores per chip, scratchpad memory, a 2D-mesh interconnect, and a revolutionary high bandwidth chip-to-chip interconnect achieve: 256 GFLOPs (Double Precision) or 512 GFLOPs (Single Precision) at 64 to 128 GFLOPs/watt * Similar performance for integer calculations. * Balanced memory bandwidth allows near-theoretical peak performance. * Extreme scalability: near limitless number of Neo chips per node. [Neo_NoC_wI] Neo Toolchain --------------------------------------------------------------------- Software development is an important part of the Neo architecture roadmap. The REX software team is working hard to build an easy-to-use modern toolchain to simplify writing new Neo applications and porting existing software to our platform. A fundamentally new hardware environment brings about several exciting challenges: Memory Management * Neo's impressive power efficiency relies on many simplifications at the hardware level. As a result, our runtime environment must meet unique requirements to ensure the task of memory management is abstracted away from users without needing complicated garbage collection or language restrictions. * The primary space for storing program code and data on Neo is made up of Scratchpad Memory. In other words, our chip does not need all of the logic required for hardware managed caching and coherency that you might find in existing processors and accelerators. Instead, we place a local memory space inside each of our cores that is lower power and lower latency (faster) than traditional caches, giving the REX Neo architecture a significant power and performance advantage over other architectures. * Our team shared an update on new techniques at the MEMSYS 2015 conference. You can access our paper here. General Programmability * Architectures that try to achieve goals similar to the Neo chip often rely on application-specific simplifications. For example, GPUs (graphics processing units) are great for tasks like video rendering and machine learning, but are not nearly as competent at running a web browser or operating system as a CPU (central processing unit). Similarly, DSP (digital signal processor) chips are often challenging to program and may rely on hardware accelerators to achieve efficient performance in many applications. We are not immune from these challenges, but are instead taking a different approach. * Our hardware simplifications are focused on exposing low level functionality. Rather than designing to provide higher level interfaces to programmers, which would require making many assumptions about workload characteristics, we strip away abstractions and implement them in software. Once a feature exists in software, it can easily be enabled or disabled at will, or even modified as application requirements change. Our hardware and software development teams work together very closely to strike a balance between extreme efficiency and reconfigurability. * Neo does not force software to adhere to any one programming model. Flexibility of execution modes and access to time-predictable atomic core-to-core messaging can support a variety of higher level models. Our custom ISA and hardware-aware optimization approach aims to maximize parallelism and enable rapid prototyping using many higher level languages. About --------------------------------------------------------------------- [sohmers] Thomas Sohmers, Founder and CEO Thomas worked at the MIT Institute for Soldier Nanotechnologies for 3 years as both an end user of HPC systems, and later transitioned into designing and building them at the lab. This experience led to starting REX Computing in 2013 as a recipient of Peter Thiel's "20 Under 20" Fellowship, where he leads architectural design and operations. Thomas has been featured on Forbes' 30 under 30 list and is a project lead for the Open Compute Project HPC Group. Paul started programming as a child, and studied CS at Georgia Tech. He has worked in fields including structural biology, theoretical ecology, and nanofabrication. Paul was part of the 2012 class of Thiel Fellows, where he founded a synthetic biology startup and worked at Lawrence Berkeley National lab for 18 months. He later joined Thomas in starting REX, where he contributes an extensive knowledge of low level software and tool development [sebexen] Paul Sebexen, CTO Our Advisors --------------------------------------------------------------------- * John Gustafson: Visiting Professor, A*STAR Computational Resource Centre former Director of eXtreme Technologies Lab, Intel former Chief Product Architect, AMD. * Bill Boas: Chairman, System Fabric Works former Director, Cray former Advanced Architectures Team, Lawrence Livermore National Lab * Kevin Moran: CEO, System Fabric Works. press View Press Releases --------------------------------------------------------------------- [logo-fortune] Moving data on a chip can take 40 times more energy than to compute that same amount of data. It also slows things down. So by tweaking the memory to make it less locked down in the hardware, REX is saving energy and boosting speed. [logo-mittr] The company recently received $1.25 million in funding from Founders Fund, a venture capital firm cofounded by Peter Thiel. [platform_logo] The result of his research is an up and coming chip called Neo, which brings to bear a new architecture, instruction set, and core design and if assumptions are correct, can do this in a power envelope and performance target that goes beyond the current requirements for exascale computing goals. x Press release REX Computing Raises $1.25M from Founders Fund's FF Science to Bring Silicon Back to Silicon Valley SAN FRANCISCO - July 21, 2015 - REX Computing, a San Francisco fabless semiconductor startup developing high performance energy-efficient computer processors, announced today that it has raised $1.25 million in seed funding led by FF Science, a vehicle of Founders Fund that invests in companies pushing the boundaries of difficult scientific and engineering challenges. The new capital will support continued development and deployment of REX's new, hyper-efficient and general purpose processor aiming to deliver a 10 to 25x increase in energy efficiency compared to the current state-of-the-art. "It has been decades since the industry that gave Silicon Valley its name - the business of semiconductors and microprocessors - has managed to produce anything beyond incremental innovation, myopically chasing the Moore's law curve." said Aaron VanDevender, Chief Scientist at Founders Fund. "REX is rethinking the integrated the computing stack---hardware and software---to produce dramatic improvements in energy efficiency. If we want ubiquitous supercomputing, we can't wait for Moore. We need REX." REX Computing was founded in 2013 by Thomas Sohmers and Paul Sebexen following their selection as Thiel Fellows by Silicon Valley investor and philanthropist Peter Thiel. Sohmers started REX to break through barriers in power efficiency and programmability of large-scale computer systems. REX's Neo architecture is the first solution solving these problems plaguing all areas of computing by targeting the key area contributing to power usage in processors: the memory system. Processors typically require 40 times more energy to exchange data with local memory than performing useful computational work with that data; over 60% of this energy usage is dissipated in the processor's hardware-managed cache hierarchy. The Neo architecture addresses these problems by removing unnecessary complexity from hardware, resulting in smaller chip area and less power consumption, instead providing similar functionality more efficiently in a rich software toolchain. "We've discovered a major flaw in processor design that has persisted for 20 years. Memory movement is the largest consumer of power and the biggest bottleneck in a modern processor, but the industry has primarily focused on improving raw performance, ignoring the efficiency of data movement." said Sohmers. "Simply tweaking and patching longstanding chip architectures as industry incumbents have already done will not give us the kind of energy efficiency or performance increases needed to effectively continue Moore's law. We have rethought computing architecture from the ground up to design our Neo chip, featuring a completely new core design including software managed scratchpad memory, 256 cores per chip, a mesh network-on-chip and a high bandwidth chip-to-chip interconnect." The REX Neo processor is targeting 256 GFLOPs of double precision floating point performance with the package and power budget of a smartphone-class processor. The 64 double precision GFLOPs per watt efficiency metric is over 10 times more efficient than the best processors available today. REX is working with early customers in fields related to digital signal processing, image processing, computer vision, machine learning, and other computationally-intensive application spaces, and expects first silicon shipping to customers in 2016. About REX Computing Founded in 2013, REX Computing is a fabless semiconductor company developing a new processor architecture solving major problems in power efficiency and programability. The 256-core Neo processor will be the first chip to reach over 50 GFLOPs per watt of double precision processing efficiency, bringing capabilities traditionally restricted to large supercomputers and data centers into low power and embedded application spaces. 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